Recent Seminars and Conferences



Correlation of Defect Formation during NBTI and TDDB in TiN/High-k Gate Stacks

Speaker:	Prof. Durgamadhab Misra
Seminar Details:	PFor high speed and low power applications high-k dielectric materials are currently being integrated into standard CMOS technologies. At present, reliability requirements of advanced gate stacks with high-k dielectrics with metal gate electrodes are of intensive research interests as these high-k dielectrics needs to meet the silicon dioxide standards. In this talk some of the electrical characterization relating to gate stack reliability will be discussed. Correlation of defect formation among degradation mechanisms such as charge trapping, NBTI and breakdown will be evaluated as a function of interfacial layer properties. A variety of dielectric stacks were considered. It seems that NBTI induced defects, generated at the interface and in the interfacial layer were somewhat identical to the defects that dominate the breakdown process.
Speaker Details:	Prof. Durgamadhab Misra Elect & Comp Engg. Dept, New Jersey Institute of Technology (NJIT), Newark, NJ 07102, USA
Date:	Monday, March 8, 2010
Venue:	Nanoelectronics Conference Room at EE annex