Recent Seminars and Conferences



Test Scheduling for Circuits in Micron to Deep Submicron Technologies

Speaker:	Dr.Kewal Saluja, Professor, Dept. of Elect.& Computer Engr., University of Wisconsin-Madison
Seminar Details:	We discuss the test scheduling problem. We first provide a historical perspective of the original test scheduling formulation that dealt only with resource conflicts, followed by the consideration of power constraint test scheduling. We then move on to the recent formulations which include dealing with thermal constraint. We explain solutions, their limitations and the challenges that remain. With the emergence of on-chip sensors, in future it may be possible to leverage the use of such sensors to arrive at more efficient schedules. The presentation explains these new opportunities and suggests research directions.
Date and Time:	4 pm, 13th January 2011
Venue:	Room No.301, GG Building, 3rd Floor, EE Dept.