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RESUME

1. Name in full Prakash Ramchandra Apte

                                       (surname underlined)

2. Address

Present      Dr. Prakash R. Apte
                    BTR-2, Lakeside
                    IIT Campus
Powai, Mumbai - 400 076
                    India

Permanent     Same as above

Telephone Office     (off)         +91-22-576 7442
Fax                            (office)     +91-22-572 3707 (EE Office)
e-mail   apte@ee.iitb.ac.in

Telephone  Res.       (home)     +91-22-572 0426 and +91-22-576 8442

3. Year of Birth   1947 Nationality Indian

4. Present employment

Date of joining     1-Oct-2001 as Professor in EE Department
Organization       Indian Institute of Technology at Bombay, Powai, Mumbai-400076
Designation         Emeritus Fellow

Previous Employment

Date of joining     11-Jan-1971
Organization       Tata Institute of Fundamental Research, Colaba, Mumbai-400005
Date of leaving     30-Sept-2001

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5. Area of specialization

(1995 - ) Micro-ElectroMechanical Systems (MEMS) in silicon

(1992 - ) Product/Process Quality Improvement through Taguchi and TRIZ methods

(1988 - 1995) High Tc Superconducting materials and devices

(1970 - 1988) Silicon Planar Devices,  ICs and  Technology

For Details click on individual items

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6. Academic record starting with graduation

B.E. (Elec. Engg)             Indore University         1968 **
M.Tech. (Elec. Engg)     IIT, Kanpur                    1970
Ph.D. (physics)               Bombay University       1988

** Gold medal for B.E. 1968 of Indore University (in engineering faculty) for securing
      1^st rank among all engineering branches of Indore University (approx. 300 students).

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7. Statement of objectives

1. I work in the one or more aspects of MEMS

• new or novel concepts, proof-of-concept

• design - analysis, simulation, synthesis, optimization

• robust design - insensitivity to variations, yield/reliability improvement

• fabrication processes - innovative problem solving,

development of new processes,
                                                      optimization of existing processes

or

        b. I work in any of the silicon IC technology issues, as given below,

• Innovative Problem Solving (TRIZ) - eliminating contradictions and harmful effects,

development and improvement of new processes

• Robust Design (Taguchi Method) - insensitivity to variations,

optimization of existing processes,
                                                                             yield/reliability improvement

Date : 16-Aug-2013 - - - - - - - - - - - - - - - - - - -

Place : Mumbai, India

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                                                                                                                            signed (Prakash R. Apte)

Go back to Apte's web-page  http://www.ee.iitb.ac.in/~apte