POST GRADUATE THESIS SUPERVISION
:
co-guide : Prof. M.K. Achuthan, EE dept,
IIT Madras
Ser. No. name of student
title of thesis
master's level
year
-
Mr. D.M. Jagdeesha, "Design and Implementation of a Bidirectional
8-bit Binary - BCD converter on an LSI chip using Computer Aids", (M.Tech.)
1982, EE dept, IIT Madras
-
Mr.Ganesan " Indian script generation logic" (M.Tech),
1982, EE dept, IIT Madras
-
Mr. Brahmaji " CRT controller logic " (M.Tech)
1982, EE dept, IIT Madras
-
Mr. Mallikarjun " Systolic Array Processor for Signal Processing
" (M.Tech)
1983, EE dept, IIT Madras
-
Mr. B.S.Raman "A microprocessor interface chip for X-Y Plotter
application" (M.Tech.)
1984, EE dept, IIT Madras
-
Mr. P.K.Banerjee and D.Roychoudhuri "Switch Capacitor Filter
- CAD and Design of Follow the Leader Filter" (M.Tech)
1984, EE dept, IIT Madras
-
Mr. S.Roy "Gate Array Realization of Alarm Annunciator sequences"
(M.Tech)
1984, EE dept, IIT Madras
Go back to Teach
LSI/VLSI Course at IIT Madras (1981-84)
Go back to Teach
Taguchi and TRIZ Methods
Go back to Apte's
web-page