3. Brief
outline of Major Activities during 1971-1980 :
During
this period, the following 4 major activities were pursued;
(1) Thin Film Hybrid Integrated circuit (Tantalum-based)
(1971-72):
(Under the
guidance of Mr. R. Pinto and Prof. K.V. Ramanathan)
A thin film hybrid circuit, a 3-stage amplifier, consisting
of DC sputtered Tantalum thin film resistors, tantalum oxide capacitors
and npn chip transistors, was fabricated. At the end of 2 years work, 2
working units were made. New method of trimming of Tantalum resistor was
developed. (A paper was presented at the DAE symposium at Hyderabad in
1972).
(2) 7400-series TTL technology development (1972-76):
(Co-workers
: Mr. P.A. Mhaskar, Mr. T.U. Pisharody, Guidance : Prof. K.V. Ramanathan
)
A landmark achievement for our group and Tata
Institute of Fundamental Research was reached when we successfully completed
the TTL technology development through the test vehicle of 7420 chip, a
dual quad input NAND gate. The knowhow was then transferred to Bharat Electronics
limited, Bangalore during 1972-73 period. At the same time new computer
programs and plot-cut techniques were developed for designing other TTL
series chips (like 7400 - quad 2-input NAND gate). The 7400 chip was the
first ever chip designed in India, just as 7420 was the first ever TTL
chip fabricated in India.
(3) IC Technology Development at Stanford University (1977-78):
(Coworker:
P.W. Barth, Supervisor: Dr. Krishna Saraswat, Guidance : Prof. J.B. Angell)
I worked at the Stanford University as a research
associate at the Stanford IC lab for 1 and 1/2 years. I worked on new IC
technology development (dielectric isolation technology). I designed various
test circuits and a 256-bit static memory as the test vehicle for this
technology. The chip design and fabrication was done successfully in 1978.
A paper was published in IEEE trans. Electron-Devices based on this work.
(4) MOS circuit design and technology development (1978-1980):
(Co-workers: P.S. Subramanian, Dinesh K. Sharma, Guidance : Prof. K.V.
Ramanathan)
MOS (Metal oxide silicon) FET (Field Effect Transistors)
and LSI circuits were taken up as the next level of involvement in the
IC revolution. MOS metal gate technology was developed using a Watch-chip
as the test vehicle. This development was finished in 1979 and first MOS
LSI in India was fabricated in Tata Institute of Fundamental Research labs.
Circuit design was also taken up as an important activity.
Our own graphics layout package, IGSYS, alongwith SPICE (from Berkeley),
MSINC (Stanford), Logsim (HP) were integrated as tools for designing, checking
and laying out MOS LSI circuits. National seminars were held on premises
of Tata Institute of Fundamental Research and our group was recognized
as the leader in the IC technology in India.
Go back to other Work
done during 1990-99 and 1980-90
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