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4th IEEE International Workshop on Reliability Aware System Design and Test

(In conjunction with the International Conference on VLSI Design)

Pune, India January 9-10, 2013

 

 

Advance Program

 

Day 1 (Jan 9)

5:30 pm  -- 5:40 pm

Inauguration and Opening Remarks

5:40 pm -- 6:20 pm

Keynote 1

6:20 pm -- 7:00 pm

Invited Talk 1

 

Day 2 (Jan 10)

9:00 am -- 9:40 am

Keynote 2

9:40 am  -- 10:25 am

Embedded Tutorial

10:25 am -- 11:45 am

Coffee Break

11:45 am -- 12:15 pm

Invited Talk 2

12:15 pm -- 1:15 pm

Session 1

1:15 pm -- 2:15 pm

Lunch Break

2:15 pm -- 2:45 pm

Invited Talk 3

2:45 pm -- 3:45 pm

Session 2

3:45 pm -- 4:05 pm

Coffee Break

4:05 pm -- 5:05 pm

Session 3

5:05 pm -- 5:10 pm

Closing