SEQUEL (A Solver for circuit EQuations with User-defined ELements) is a general-purpose simulation package developed at IIT Bombay. It has been extensively used for R and D activities at IIT Bombay. Recently, several examples in electronics and power electronics have been added to the package, making it attractive for teaching purposes.

Features

• DC, transient, small-signal
• Efficient "steady-state waveform" computation
• digital (event-driven) simulation
• mixed-signal simulation
• perfectly "general" elements (mechanical, thermal, etc.)
• GUI for schematic capture, plotting, etc.
• Allows user-defined elements (linux version only)
• Free !!

• class-room demonstration of basic concepts by running exisiting examples in class
• assigning simulation exercises in which students tinker with parameter values and observe their effect on simulation results
• assigning design problems (for which simulation can be used to verify the design)
• assigning "projects" in which students design and simulate a complex circuit or system

• Electronics examples
  ppt format (5 MB)
  pdf format (5 MB)
• Power Electronics examples
  ppt format (5 MB)
  pdf format (6 MB)
• SEQUEL distribution for Windows (35 MB) (for Windows 2000/XP/vista)
• SEQUEL distribution for Linux
  SEQUEL GUI for Linux (35 MB)
  SEQUEL binaries for Linux (2 MB)
• Slides on circuit simulation (presentation format)
  Techniques for circuit simulation (2 MB)
  Circuit simulation: transient analysis (2 MB)
• Slides on circuit simulation (hand-out format)
  These are for printing (they will use much less toner than the presentation format), but print them only if you must. Save trees!
  Techniques for circuit simulation (2 MB)
  Circuit simulation: transient analysis (2 MB)

• Extract files to a directory of your choice, say, xyz (preferably on D: or E: drive, and not on the Desktop or C:).
• Change to directory xyz.
• Run the executable file, SequelGUI2_Release\SequelGUI.exe.
• Click on the help button "SequelGUI Help" to view the GUI manual.
• Follow instructions in the manual to run an exisiting project or create a new project.

• copy sequel_linux.tar.gz to your home directory
• cd ~
• tar zxvf sequel_linux.tar.gz
• chmod -R 777 sequel_fixed
• Extract GUI files to a directory of your choice, say, xyz.
• cd xyz/SequelGUI2_Release
• ./SequelGUI2 &
• Follow instructions in the manual to run an exisiting project or create a new project.

1. "Simulation of Power Electronic Circuits," by M.B. Patil, V. Ramanarayanan, V.T. Ranganathan, Narosa, 2009.
2. M. B. Patil, "A public-domain program for mixed-signal simulation," IEEE Trans. Education, pp. 187-193, May 2002.
3. M. B. Patil, S. P. Das, A. Joshi, and M. C. Chandorkar, "A new public-domain simulator for power electronics circuits," IEEE Trans. Education, vol. 45, pp. 79-85, Feb. 2002.
4. D. Vinay Kumar, R. A. Thakker, M. B. Patil, and V. R. Rao, "Simulation study of non quasi static behaviour of MOS transistors," Proc. 5th Intl. Conf. on Modeling and Simulation of Microsystems, San Juan, Peurto Rico, April 22, 2002. This describes how SEQUEL can be used for "look-up table"-based simulation of submicron MOS transistors.
5. M. B. Patil, M. C. Chandorkar, B. G. Fernandes, and K. Chatterjee, "Computation of steady-state response in power electronic circuits," IETE J. Research, vol. 48, no. 6, pp. 471-477, Nov. 2002.
6. Dennis Sasikumar, R. Manchanda, and M. B. Patil, "The role of dendritic spines in EPSP amplification: a computational pilot study using a novel simulation platform," Int. Symp. Neuroscience, Manesar, India, Dec 15-17, 2003. (awarded the best poster prize in the Computational Neuroscience section)
   
7. D. Vinay Kumar, K. Narasimhulu, M. Shojaei-Baghini, D. K. Sharma, M. B. Patil, and V. R. Rao, "Evaluation of the impact of layout on device and analog circuit performance with LAC MOSFETs," IEEE Trans. Electron Devices, vol. 52, pp. 1603-1609, 2005.
8. S. N. Agarwal, A. Jha, D. Vinay Kumar, J. Vasi, M. B. Patil, and S. C. Rustagi, "Look-up table approach for RF circuit simulation using a novel measurement technique," IEEE Trans. Electron Devices, vol. 52, pp. 973-979, 2005.
9. B. P. Harish, N. Bhat, and M. B. Patil, "Analytical modeling of CMOS circuit delay distribution due to concurrent variations in multile processes," Solid-State Electron., vol. 50, pp. 1252-1260, 2006.
10. B. P. Harish, N. Bhat, and M. B. Patil, "On a generalized framework for modeling the effects of process variations on circuit delay performance using response surface methodology," IEEE Trans. CAD, vol. 26, pp. 606-614, 2007.
11. R. R. Sawant and M. C. Chandorkar, "Methods for multi-functional converter control in three-phase four-wire systems," IET Power Electronics, vol. 2, issue 1, pp. 52-66, Jan. 2009.
12. R. R. Sawant and M. C. Chandorkar, "A Multifunctional Four-Leg Grid-Connected Compensator," IEEE Trans. Industry Applications, vol. 45, pp. 245-259, 2009.
13. R. A. Thakker, C. Sathe, A. B. Sachid, M. S. Baghini, V. R. Rao, and M. B. Patil, "Automated Design and Optimization of Circuits in Emerging Technologies," Proc. 14th Asia and South Pacific Design Automation Conf., Yokohoma, January 19-22, 2009.
14. R. A. Thakker, C. Sathe, A. B. Sachid, M. S. Baghini, V. R. Rao, and M. B. Patil, "A Novel Table-based approach for Design of FinFET Circuits ," IEEE Trans. CAD, pp. 1061-1070, July 2009.