Mr. Friedrich Hapke MrFriedrichHapke
Director of Engineering Germany
Mentor Graphics Silicon Test Solution Division
Title: Cell-Aware Test and Diagnosis
Abstract: The keynote will address the Cell-Aware Test (CAT) approach, which enables a transistor-level and defect-based ATPG on full CMOS-based designs to significantly reduce the defect rate of manufactured ICs, including FinFET technologies. Results will be presented from a defect-oriented cell-aware ATPG fault model generation for a complete standard cell library, as well as the application of CAT to several industrial designs. Furthermore high volume production test results will be presented from a 32nm notebook processor, from a 350nm and 130nm automotive design, including the achieved defect rate reduction in defective-parts-per-million (DPPM). The keynote will also address Cell-Aware Diagnosis and physical failure analysis (PFA) results from one failing part and give an outlook for using the functionality for quickly ramping up the yield in advanced technology nodes.

Biography: Friedrich Hapke received the Diploma in electrical engineering from the University of Applied Sciences, Hamburg, Germany. He is the Director of Engineering Germany, at Mentor Graphics Silicon Test Solution Division. His primary focus is in research and development of new methods and tools for supporting defectoriented cell-aware testing, IEEE P1687, logic BIST, boundary-scan, and cell-internal failure diagnosis. His interests also include electronic design automation in general for deep-submicron technologies. Before joining Mentor Graphics, he held various research and development management positions at NXP and Philips Semiconductors. He has authored and co-authored several publications and holds over 20 patents in the area of design for test. His recent publications have been on the topic of defect-oriented cell-aware testing at the International Symposium on VLSI Design Automation and Test, 2011, in Taiwan, at the Design Automation and Test in Europe, 2012, in Dresden, Germany, at the European Test Symposium, 2012 in Annecy, France, at the International Test Conference, 2012, in Anaheim, CA, USA, at the European Test Symposium 2013, in Avignon, France, and at the International Symposium for Testing and Failure Analysis, 2013, in San Jose, CA, USA.