Since the last decade, there is a continuous demand of fabricating miniaturized hand-held consumer electronic devices having faster signal speed, better electrical performance and compact packaged size. These are the main factors pushing for the need of developing 3D interconnection and packaging solutions application for microsystems. Through-silicon Vias (TSV) is one of the 3D interconnect technology being used in several consumer products. In conventional 2D interconnects like wire bonds, interconnection length is quite large (>1-2 mm), due to which signal delay is significantly higher, which reduce overall electrical performance. However in 3D interconnects like TSVs, devices are stacked in a vertical Z-axis, resulting in short electrical paths and thus, improved electrical performance. Today, TSVs have been implemented in CMOS image sensors, flash memory stacking and wafer-level packaging of MEMS sensors, such as accelerometer, resonators, pressure sensors, etc. In this seminar, basic details of TSV and related fabrication processes will be discussed. Focus will be on the electroplated copper filled TSVs for via-last applications. Application of TSVs in wafer-level-packaging of MEMS components will be presented.
Pradeep Dixit is an Assistant Professor in Department of Mechanical Engineering, IIT Bombay. He received his PhD degree from Nanyang Technological University, Singapore in 2008. Before joining IIT Bombay, Pradeep was working in VTT Technical Research Center of Finland. His research interests are in the area of Silicon based micro fabrication processes, Microsystems packaging and 3D Integration.