The Internet of Everything (IoE) ecosystem of sensor nodes, hubs, and cloud services has grown at a rapid pace, with currently three interconnected devices for every human on earth. Powering these sensor nodes using batteries is not scalable and poses major limitations in terms of their size, cost, and accessibility. Thus, energy harvesting (EH) has been widely considered as a viable alternative for several applications. However, harvesters add their own size and cost to the sensors. To alleviate this shortcoming, the sensor is time-multiplexed to operate as an energy harvester. Specifically, this work focuses on energy harvesting using a CMOS image sensor (CIS) pixels. Many applications like tracking warehouse inventory, detecting structural faults, or detecting movements through a door require image capture at a very low frame rate. A dual-mode image sensor is well suited for such applications. The objective of this work is to demonstrate a self-powered energy harvester using CIS pixels that support the dual-mode operation. Traditional EH image sensors have used increased pixel sizes to incorporate a multiplexer in each pixel. This leads to reduced fill factor and limits its use to certain applications. Under office lighting conditions, the incident power is limited and designing an energy-autonomous system with high efficiency is challenging. The low voltage output from the pixels needs stepping up to generate the power supply rails for the imager readout circuitry. Generating two simultaneous outputs in a fully integrated solution (without using any external inductors) was the primary goal for this work. Further, the harvester needs to operate over a wide range of light intensity and loads as demanded by the application. Another challenge that must be addressed for an EH system is to enable startup without using external batteries or external components that might increase the size and weight of the solution. In our work, we employ conventional 4-T CIS pixels that share the mode multiplexers outside the array. In this fashion, we can harvest energy irrespective of the pixel pitch. We achieve the highest fill factor of 60.4% at a pitch of 5 µm with our EH pixels. Fully integrated switched capacitor (SC) DC/DC converters boost the pixel output to the required supply rails. Using this approach, our chip, implemented in a 130 nm CMOS process, achieves a peak power efficiency of 52.4% at an output power of 266 nW. Our self-powered energy harvester can cold start at low light of 25 lux (comparable to a dimly lit room) and tracks light intensity variations to deliver maximum power to the output.
Nishit Shah has graduated with his Ph. D. in Electrical Engineering from Stanford University this summer. He completed his M.Tech. (Information and Communication Technology) and B.E. (Electronics and Communications Engg.) in India in 2004 and 2006 respectively. From 2006 to 2011, he was with Texas Instruments India designing custom ASICs for low power and high precision Nyquist ADCs. From 2011 to 2012, he was with Intel India designing and evaluating Power Management ICs. He has been a recipient of John Linvill EE Department fellowship and FMA fellowship from Bosch Research and Technology Center during his Ph. D. He has three approved patents and three more in the pipeline. His research interests include low power circuit design and system modeling for ADCs and power management.