Extraction of information from data lies at the heart of data-rich applications, such as machine learning. However, this process of information extraction consumes much energy. Traditionally, industry has relied on scaling of feature sizes in semiconductor technologies (Moore's Law) to reduce energy, enhance throughput, increase functional densities, and reduce cost/transistor. However, today, energy efficiency and reliability challenges in nanoscale CMOS (and beyond CMOS) processes threaten the continuation of Moore's Law. This talk will describe a Shannon-inspired approach - statistical information processing (SIP) - for the design of energy-efficient and robust information processing systems in nanoscale process technologies. The SIP framework seeks to address this issue by treating the problem of computing on unreliable device/circuit fabrics as one of information transfer over unreliable/noisy channels. SIP seeks to transform computing from its deterministic roots in von Neumann architecture to a foundation that is systems-driven and statistical in nature. A number of examples of Shannon-inspired IC prototypes will be described demonstrating the practicality of these ideas. This talk will conclude with an overview of the Systems On Nanoscale Information fabriCs (SONIC) Center, a multi-university research center based at the University of Illinois at Urbana-Champaign, focused on developing a Shannon and brain-inspired foundations for information processing on CMOS and beyond CMOS nanoscale fabrics.
Naresh R. Shanbhag is the Jack Kilby Professor of Electrical and Computer Engineering in the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. His research interests are in the design of robust and energy-efficient integrated circuits and systems for signal processing, communications and machine learning applications. Dr. Shanbhag received the 2010 Richard Newton GSRC Industrial Impact Award, became an IEEE Fellow in 2006, received the 2006 IEEE Journal of Solid-State Circuits Best Paper Award, the 2001 IEEE Transactions on VLSI Best Paper Award, the 1999 IEEE Leon K. Kirchmayer Best Paper Award, the 1999 Xerox Faculty Award, the Distinguished Lecturership from the IEEE Circuits and Systems Society in 1997, the National Science Foundation CAREER Award in 1996, and the 1994 Darlington Best Paper Award from the IEEE Circuits and Systems Society. Dr. Shanbhag is serving as an Associate Editor for the IEEE Journal on Exploratory Solid-State Computation Devices and Circuits (2014-16), served as an Associate Editor for the IEEE Transaction on Circuits and Systems: Part II (97-99) and the IEEE Transactions on VLSI (99-02 and 09-11), respectively. He was the General Chair of the 2013 IEEE Workshop on Signal Processing Systems, the General co-Chair of the 2012 IEEE International Symposium on Low-Power Design (ISLPED), the Technical Program co-Chair of the 2010 ISLPED, and served on the technical program (wireline subcommittee) committee of the International Solid-State Circuits Conference (ISSCC) from 2007-11. Since January 2013, he is the founding Director of the Systems On Nanoscale Information fabriCs (SONIC) Center, a 5-year multi-university center funded by DARPA and SRC under the STARnet phase of FCRP. In 2000, Dr. Shanbhag co-founded and served as the Chief Technology Officer of Intersymbol Communications, Inc., a venture-funded fabless semiconductor start-up that provides DSP-enhanced mixed-signal ICs for electronic dispersion compensation of OC-192 optical links. In 2007, Intersymbol Communications, Inc., was acquired by Finisar Corporation, Inc.