Low power requirements by the International Technology Roadmap for Semiconductors (ITRS) dictate integration of high-k metal gates and novel devices such as FinFETs in CMOS technologies. To attend the current trend in device scaling for sub-14 nm CMOS technology (More Moore) EOT scaling of gate dielectric beyond 0.7 nm will be required. Various atomic layer deposition (ALD) methods of HfO2-based high-k gate dielectrics are currently underway to enhance the dielectric constant and reliability in order to meet the above requirements. For example, cyclic deposition of ALD Hf1-xZrxO2 samples where the dielectrics were exposed to intermediate slot plane antenna (SPA) Ar plasma (DSDS). In addition, variation of Al percentage and distribution in HfO2 is carried out when HfAlOx and HfO2 are deposited by ALD in a layered structure. To further enhance the device performance, high mobility channel materials with high-k dielectrics are currently being integrated. Substrates like Ge and III-V materials are being considered for their high hole and electron mobility respectively. Electrical performance in these devices depends on the high-k deposition process, precise selection of deposition parameters, predeposition surface treatments and subsequent annealing temperatures. These variations in process conditions significantly impact the nature of the dielectric-semiconductor interface that controls the channel mobility. This talk will outline some of the recent developments of EOT scaling of high-k gate dielectrics on silicon and germanium and how it impacts the interface; and the challenges of obtaining an acceptable interface for high-k on high mobility substrates.
Prof. Durga Misra is a Professor in the Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, USA. His current research interests are in the areas of nanoelectronic/optoelectronic devices and circuits; especially in the area of nanometer CMOS gate stacks and device reliability. Prof. Misra received several research awards from the National Science Foundation, NASA, State of New Jersey and various Industries. He is currently a Distinguished Lecturer of IEEE Electron Devices Society (EDS) and serving in the IEE EDS Board of Governors. He served as the EDS SRC Chair for North America East (Regions 1, 2, 3, and 7). He has organized many IEEE International Conferences on Solid-State Science and Technology field and at the Technical Meetings of the Electrochemical Society as General Chair, Program Chair and Track Chair, Technical Program Committee member. He is a Fellow of the Electrochemical Society (ECS) and served in the ECS Board as a Board Member (2008-10). He received the Thomas Collinan Award from the Dielectric Science & Technology Division of ECS. He is also the winner of the Electronic and Photonic Division Award from ECS. He edited and co-edited more than 40 books and conference proceedings in his field of research. He has published more than 85 technical articles in peer reviewed Journals and more than 160 articles in International Conference proceedings including 75 Invited Talks. He has graduated 17 PhD students and 35 MS students. He received the M.S. and Ph.D. degrees in electrical engineering from the University of Waterloo, Waterloo, ON, Canada, in 1985 and 1988, respectively.