Implementing machine learning (ML) algorithms on low-power embedded platforms is made challenging due to their enormous energy and latency costs. Both energy and latency costs of inference applications are dominated by the need to transfer massive data volumes over the ubiquitous processor-memory interface. This talk will begin with a description of our work in obtaining analytical guarantees on the precision requirements of deep neural networks (ICML 2017) to algorithmically minimize the storage and computational costs. Next, we will present the Deep In-memory Architecture (DIMA) in which the processor-memory interface is mostly bypassed by embedding mixed-signal computations in the periphery of the bitcell array (BCA), and using algorithmic and architectural techniques to compensate for analog non-idealities. Thus, DIMAs perform non von Neumann computation inside a memory array such that the stored data is never communicated to the outside. Rather, what is communicated is a functional result over a large set of the stored data thereby amortizing the energy and latency costs of the processor-memory interface over this set. DIMA design requires joint addressing of circuit, architecture and algorithmic issues. DIMA design principles will be articulated and illustrated via the measured results from multiple prototype SRAM DIMA ICs designed in a 65nm CMOS process which have demonstrated EDP gains of over 50X over von Neumann (SRAM+custom digital) implementations of various ML kernels (JSSCâ€™18, ESSCIRCâ€™17,ISSCCâ€™18). This talk makes the case that combining minimum precision DNNs with DIMA can enable complex inference applications on low-power embedded platforms.
Naresh R. Shanbhag is the Jack Kilby Professor of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. He is interested in the design of energy-efficient information processing systems in silicon for communications, signal processing and machine learning. From 1993 to 1995, he led the design of VDSL transceiver chip-sets at AT&T Bell Laboratories at Murray Hill before joining the University of Illinois at Urbana-Champaign in August 1995. He has held visiting faculty appointments at the National Taiwan University (Aug.-Dec. 2007) and Stanford University (Aug.-Dec. 2014). In 2000, Dr. Shanbhag co-founded and served as the Chief Technology Officer of Intersymbol Communications, Inc., (acquired in 2007 by Finisar Corp (NASDAQ:FNSR)) a semiconductor start-up focused on DSP-enhanced mixed signal ICs for OC-192 optical links. Dr. Shanbhag has received a number of awards including the 2006 IEEE Journal of Solid-State Circuits Best Paper Award and became an IEEE Fellow in 2006. Since January 2013, he is the founding Director of the Systems On Nanoscale Information fabriCs (SONIC) Center, a 5-year multi-university center funded by DARPA and SRC under the STARnet program