Achieving low-power and energy-efficiency in order to maintain the reliability of the VLSI systems is becoming challenging in scaled technologies. The energy dissipation per computation is limited by the lowest operating supply voltage (Vmin). In state of the art design, failures due to process variation obstruct the Vmin scaling. In this talk, I will present some of the disruptive design principles in logic and memories to break the Vmin wall and attain highly energy-efficient nanoscaled systems. In particular, I will discuss an adaptive and self-healing design philosophy for logic to lower the Vmin without sacrificing frequency or functionality. Next, I will present selfhealing embedded memories to lower the Vmin without any functional failures. The ultimate aim is to develop low-power, energy-efficient and self-healing systems that would function even under process uncertainties.
Dr. Swaroop Ghosh received his B.E. (Hons.) from Indian Institute of Technology, Roorkee, India in 2000 and Ph.D. from Purdue University in 2008. He joined the faculty of University of South Florida in Fall 2012. Dr. Ghosh was a senior research and development engineer in Advanced Design, Intel Corp from 2008 to 2012. At Intel, his research was focused on low power and robust embedded memory design in scaled technologies. He has filed four US patents, published over 30 papers and authored a book chapter. He has served in the technical program committees of VLSI Design, ISQED, ASQED, VLSI-SOC, IEDEC and NDCS. His research interests include low-power, energy-efficient and robust circuit/system design and digital testing for nanometer technologies. Dr. Ghosh is a member of IEEE