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Shalabh Gupta

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Research Interests

  • High-Speed SerDes / Clock and Data Recovery Circuits
  • High-Capacity Low-Power Data Center Interconnects
  • Optical Fiber Communication Systems
  • Silicon Photonics
  • CMOS Analog/RF/mmWave Integrated Circuits & Systems
  • Microwave Photonics and Radio-over-Fiber
  • Signal Processing for Communication Systems
  • Beamforming Antenna Systems

Teaching

  • EE618 (CMOS Analog VLSI Design) – Autumn 2010, 2011.
  • EE619 (RF Integrated Circuit Design) – Spring 2010-16, 2020.
  • EE668 (Systems Design) – Spring 2012, 2017, 2018-19 (A).
  • EE309 (Microprocessors) – Autumn 2012 (Lectures), Autumn 2013.
  • EE318 (Electronics Design Lab) – Spring 2014, 2016 (A).
  • EE344 (Electronics Design Lab) – Spring 2017, 2018-19 (A), 2021 (A).
  • EE308 (Communication Systems) – Autumn 2017-19.
  • EE340 (Communications Laboratory) – Autumn 2014-15, 2016 (A), 2019.
  • EE204M (Analog Circuits - Minor) – Autumn 2020 (A).
  • EE800 (High-Speed Interconnects: Signaling and Synchronization) – Spring 2021-22.

Biography

Educational Background

  • PhD: EE, University of California Los Angeles, 2006-2009
  • MS: EE, University of California Los Angeles, 2001-2003
    (degree obtained in 2004)
  • B.Tech: EE, IIT Kanpur, 1997-2001

Work Experience

  • Professor, EE Department, IIT Bombay (2019-Present)
  • Associate Professor, EE Department, IIT Bombay (2015-2019)
  • Assistant Professor, EE Department, IIT Bombay (2009-2015)
  • Optical Communications Research at NEC Labs, Princeton, NJ, USA (Summer 2008, 2009)
  • Senior Engineer RFIC Design, Skyworks Solutions Inc., Irvine, CA, USA (2005-2006)
  • Analog Design Engineer, Chrontel Inc., San Jose, CA, USA (2003-2005)

Publications

Journal papers (accepted/published)

  • S. Chugh, R. Ashok, P. Jain, S. Naaz, A. Sidhique and S. Gupta, “An Analog EIC-PIC Receiver with Carrier Phase Recovery for Self-Homodyne Coherent DCIs,” IEEE Transactions on Circuits and Systems II: Express Briefs (2022). https://doi.org/10.1109/TCSII.2022.3167673
  • S. Goyal, G. Parulekar, and S. Gupta, “A True Full-Duplex IO (TFD-IO) with Background SI Cancellation for High-Density Interfaces,” IEEE Transactions on VLSI Systems (2022). https://doi.org/10.1109/TVLSI.2022.3146326
  • R. Ashok, N. Nambath and S. Gupta, “Carrier Phase Recovery and Compensation in Analog Signal Processing Based Coherent Receivers,” IEEE/OPTICA Journal of Lightwave Technology, 40(8), 2341 – 2347 (2022). https://doi.org/10.1109/JLT.2021.3135857
  • R. Ashok, S. Naaz, R. Kamran, and S. Gupta, “Analog Domain Carrier Phase Synchronization in Coherent Homodyne Data Center Interconnects,” IEEE/OPTICA Journal of Lightwave Technology, 39(19), 6204 – 6214 (2021). DOI: https://doi.org/10.1109/JLT.2021.3096605
  • N. B. Thaker, R. Ashok, S. Manikandan, N. Nambath, and S. Gupta, “A Cost-Effective Solution for Testing High-Performance Integrated Circuits,” IEEE Transactions on Components, Packaging and Manufacturing Technology, 11(4), 557 – 564 (2021). https://doi.org/10.1109/TCPMT.2021.3068845.
  • N. Nambath, R. Ashok, S. Manikandan, N. B. Thaker, M. Anghan, R. Kamran, S. Anmadwar, and S. Gupta, “All-Analog Adaptive Equalizer for Coherent Data Center Interconnects,” IEEE/OSA Journal of Lightwave Technology, 38(21), 5867 – 5874 (2020). https://doi.org/10.1109/JLT.2020.2987140.
  • R. Kamran, S. Naaz, S. Goyal, and S. Gupta, “High-Capacity Coherent DCIs using Pol-Muxed Carrier and LO-Less Receiver,” IEEE/OSA Journal of Lightwave Technology, 38(13), 3461 - 3468 (2020). https://doi.org/10.1109/JLT.2020.2972913.
  • R. Kamran, N. Nambath, S. Manikandan, R. Ashok, R. Jain, N. B. Thaker, and S. Gupta, “Demonstration of a Low-power, LO-less and DSP-free Coherent Receiver for Data Center Interconnects,” Applied Optics, 59(7), 2031–2041 (2020). https://doi.org/10.1364/AO.383185.2020.
  • P. Paliwal, V. Yadav, Z. Ali, and S. Gupta, “A Fast Settling Fractional-N DPLL with Loop-Order Switching,” IEEE Transactions on VLSI, 28(3), 714 – 725 (2020). https://doi.org/10.1109/TVLSI.2019.2956100.
  • A. Singh, S. Chugh, and S. Gupta, “Coupling Sensitivity and Radiation Pattern of Vertical Grating Coupler,” Applied Optics, 58(27), 7280 - 7284 (2019).
  • S. Jagtap, S. Anmadwar, S. Rudrapati, and S. Gupta, “A single event transient tolerant high frequency CMOS quadrature phase oscillator,” IEEE TNS, 66(9), 2072 - 2079 (2019).
  • R. Kamran, S. Manikandan, and S. Gupta, “Cascaded equalizer for polarization multiplexed carrier based self-homodyne QPSK links,” Optical Fiber Technology, 50, 233 – 241 (2019).
  • R. Sivaramakrishna and S. Gupta, “A Wide Operating Range LC Quadrature Phase VCO with Seamless Tunability,” IEEE Transactions on Circuits and Systems II: Express Briefs, 65(12), 1914 – 1918 (2018).
  • M. Sakare, S. P. Kumar, and S. Gupta, “Bandwidth Enhancement of Flip-Flops Using Feedback for High-Speed Integrated Circuits,” IEEE Transactions on Circuits and Systems II: Express Briefs, 63(8), 768 - 772 (2016).
  • S. Jagtap, D. Sharma, and S. Gupta, “Design of SET tolerant LC oscillators using distributed bias circuitry,” Microelectronics Reliability, 55(9), 1537 - 1541 (2015).
  • N. Nambath, R. K. Raveendranath, D. Banerjee, A. Sharma, A. Shankar, and S. Gupta, “Analog domain signal processing based low power 100 Gbps DP-QPSK receiver,” IEEE/OSA Journal of Lightwave Technology, 33(15), 3189 - 3197 (2015).
  • M. Singh and S. Gupta, “Multi-Level Pseudo Random Sequence Generation for Coherent Optical Transmission Systems,” IEEE Communications Letters 18(10), 1723-1726 (2014).
  • N. Nambath, P. K. Moyade, A. Ansari, and S. Gupta, “Analog domain adaptive equalizer for low power 40 Gbps DP-QPSK receivers,” Sadhana 39(2), 409-418 (2014).
  • A. M. Fard, S. Gupta, and B. Jalali, “Photonic time-stretch digitizer and its extension to real-time spectroscopy and imaging,” Laser & Photonics Reviews 7(2), no. 2, 207–263 (2013).
  • A. Fard, S. Gupta, and B. Jalali, “Digital Broadband Linearization Technique and its Application to Photonic Time-Stretch Analog-to-Digital Converter,” Optics Letters 36(7), 1077-1079 (2011).
  • J. Yu, X. Zhou, S. Gupta, Y. K. Huang, and M. F. Huang, “A Novel Scheme to Generate 112.8-Gb/s PM-RZ-64QAM Optical Signal,” IEEE Photonics Technology Letters 22(2), 115-117 (2010).
  • D. Solli, S. Gupta, and B. Jalali, “Optical phase recovery in the dispersive Fourier transform,” Applied Physics Letters 95, 231108 (2009).
  • S. Gupta and B. Jalali, “Time Stretch Enhanced Recording Oscilloscope,” Applied Physics Letters 94, 041105 (2009).
  • B. Jalali, D. Solli, and S. Gupta, “Silicon Photonics: Silicon's time lens,” Nature Photonics 3(1), 8-10 (2009).
  • S. Gupta and B. Jalali, “Time-warp correction and calibration in photonic time-stretch analog-to-digital converter,” Optics Letters 33(22), 2674-2676 (2008).
  • S. Gupta, G. C. Valley, and B. Jalali, “Distortion Cancellation in Time-Stretch Analog-to-Digital Converter,” IEEE/OSA Journal of Lightwave Technology 25(12), 3716-3721 (2007).
  • A. Tarighat, S. Gupta, A. H. Sayed, and B. Jalali, “Two-dimensional spatio-temporal signal processing for dispersion compensation in time-stretched ADC,” IEEE/OSA Journal of Lightwave Technology 25(6), 1580-1587 (2007).
  • S. Gupta and E. R. Brown, “Noise-correlating radar based on retrodirective antennas,” IEEE Transactions on Aerospace and Electronic Systems 43(2), 472-479 (2007).


Conference Papers

  • Z. Ali and S. Gupta “A Fast Locking Ring Oscillator Based Fractional-NDPLL with an Assistance From a LUT-Based FSM,” IEEE International Symposium on Circuits and Systems (ISCAS), Austin, Texas (USA), May 28–June 1, 2022.
  • R. Ashok, S. Chugh, and S. Gupta, “Millimeter wave frequency synthesizers using integrated photonics aided phase locked loops,” 5th IEEE Workshop on Recent Advances in Photonics (IEEE WRAP), Mumbai, India, March 2022.
  • A. Sidhique, R. Kamran, S. Chugh, and S. Gupta, “Optical Equalizer for Short-Reach PAM-4 Data Center Interconnects,” 5th IEEE Workshop on Recent Advances in Photonics (IEEE WRAP), Mumbai, India, March 2022.
  • R. Kamran, A. Sidhique, S. Naaz, A. Krishnan, and S. Gupta, “Wavelength Division Multiplexed PMC-SH Link with Adaptive Polarization Control,” 5th IEEE Workshop on Recent Advances in Photonics (IEEE WRAP), Mumbai, India, March 2022.
  • R. Thukral, M. Goswami, S. Jagtap, S. Goyal, and S. Gupta, “A Multi-Octave Frequency Range SerDes with a DLL Free Receiver,” 25th International Symposium on VLSI Design and Test (VDAT), 2021.
  • S. Chugh, and S. Gupta, “Demonstration of a Silicon Photonic Transmitter,” OSA Advanced Photonics Congress (Virtual Event), July 2021.
  • A. Sidhique, S. Chugh, A. Singh, and S. Gupta, “Demonstration of an Integrated Optical Equalizer for Direct Detection Links,” OSA Advanced Photonics Congress – Signal Processing in Photonic Communications (Virtual Event), July 2021.
  • M. C. Shekar, S. Goyal, and S. Gupta, “A 27S/32S DC-balanced line coding scheme for PAM-4 signaling,” The 34th International Conference on VLSI Design (Virtual Conference), India, February 2021.
  • S. Sen, U. Upadhyaya, K. R. Kondreddy, A. Goyal, S. Goyal, and S. Gupta, “A Low Jitter Digital Loop CDR Based 8-16 Gbps SerDes in 65 nm CMOS Technology,” The 34th International Conference on VLSI Design, India (Virtual Conference), February 2021.
  • G. Tiwari, M. U. Shaikh, R. Sivaramakrishna, S. Gupta, “A Wide Locking Range Bleed-Current Injection-Enhanced Miller Divider in V-Band,” 2020 IEEE Asia-Pacific Microwave Conference (APMC), Honk Kong (Virtual Conference), December 2020.
  • S. Goyal, G. A. Parulekar, and S. Gupta, “A True Full-Duplex IO for High-Density High-Speed Interconnects,” The 27th IEEE International Conference on Electronics Circuits and Systems, Glasgow, Scotland (Virtual Conference), November 2020.
  • U. Upadhyaya, S. Sen, S. Goyal, S. Gupta, “A 16 Gbps 10:1 Serializer With Active Inductor Based CTLE for High Frequency Boosting,” The 27th IEEE International Conference on Electronics Circuits and Systems, Glasgow, Scotland (Virtual Conference), November 2020.
  • Z. Ali, H. Makwana, and S. Gupta, “A Low Jitter Double-Tailed Strong-Arm Latch Based Digital-to-Time Converter (DTC),” The 27th IEEE International Conference on Electronics Circuits and Systems, Glasgow, Scotland (Virtual Conference), November 2020.
  • R. Ashok, S. Naaz, R. Kamran, A. Siddhique, and S. Gupta, “Endless optical phase delay based phase synchronization in low-power coherent DCIs,” 2020 IEEE Photonics Conference (IPC), Vancouver, BC, Canada (Virtual Conference), October 2020.
  • S. Chugh and S. Gupta, “Demonstration of a photonic digital-to-analog converter based PAM-4 Transmitter,” IEEE Optoelectronics Global Conference (OGC), Shenzhen, China, September 2020.
  • K. Patel,R. Ashok, and S. Gupta, “Equalizer-Free Clock Recovery for PAM-4 Optical Interconnects,” International Conference on Signal Processing and Communications (SPCOM), Bangalore, India, July 2020.
  • R. Ashok, R. Kamran, S. Naaz, and S. Gupta, “Demonstration of a PMC-SH link using a phase recovery IC for low-power high-capacity DCIs,” Conference on Lasers and Electro-Optics (CLEO), San Jose, California, USA, May 2020.
  • S. Chugh, S. Goyal, and S. Gupta, “Demonstration of high speed digital-to-analog conversion using photonic integration,” CLEO 2020, San Jose, CA, USA, May 2020
  • A. Singh, S. Chugh, and S. Gupta, “Stokes Vector Based Polarization Controller for Silicon Photonic Integrated Circuits,” CLEO-PR 2020, August 2020.
  • R. Ashok, G. S. Ananth, and S. Gupta, “Optical phase locked loop based carrier phase recovery and compensation for 8-PSK coherent optical links,” Workshop on Recent Advances in Photonics (WRAP), IIT Guwahati, India, December 2019.
  • A. Maurya and S. Gupta, “Radio Frequency Communication Based Safety and Security System for Fishermen,” 2019 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), Manipal, India, 2019.
  • S. Goyal, P. Agarwal, and S. Gupta, “Demonstration of a Single-Lane 80 Gbps PAM-4 Full-Duplex Serial Link,” IEEE Hot Interconnects, Santa Clara, CA, USA, August 2019.
  • R. Maheshwari, R. Ashok, S. Chugh, and S. Gupta, “High-speed electro-optic equalizer for data center interconnects,” Signal Processing in Photonic Communications (in 2019 OSA Advanced Photonics Congress), Burlingame, CA, USA, July 31 – August 1, 2019.
  • N. B. Thaker, R. Ashok, S. Manikanandan, N. Nambath, and S. Gupta, “Transmission Line Design for Testing High-Speed Integrated Circuits with Differential Signals,” 23rd IEEE Workshop on Signal and Power Integrity (SPI), Chambery, France, June 2019.
  • A. Goyal, S. Ghosh, S. Goyal, P. Paliwal, and S. Gupta, “A High-Resolution Digital Phase Interpolator Based CDR with a Half-Rate Hybrid Phase Detector,” IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, May 2019.
  • R. Kamran, S. Naaz, S. Manikandan, S. Goyal, R. Ashok, and S. Gupta, “Self-Homodyne 16-QAM Scheme for Low Complexity 200 Gbps Data Center Interconnects,” IEEE Optical Interconnects Conference, Santa Fe, NM, USA, April 2019.
  • R. Ashok, S. Manikandan, S. Chugh, S. Goyal, R. Kamran, and S. Gupta, “Demonstration of an analogue domain processing IC for carrier phase recovery and compensation in coherent links,“ OFC 2019, San Diego, CA, March 2019.
  • M. Anghan, R. Kamran, N. Gulati, N. Nambath and S. Gupta, “Adaptive polarization control for coherent optical links with polarization multiplexed carrier,” NCC 2019, IISc Bangalore, February 2019.
  • R. Kamran, G. Kamran, and S. Gupta, “A simple adaptive polarization control technique for self-homodyne QPSK systems,” Photonics 2018, IIT Delhi, December 2018.
  • R. Kamran, A. Ravichandran, and S. Gupta, “Noise penalty for polarization multiplexed carrier based self-homodyne systems,” Photonics 2018, IIT Delhi, December 2018.
  • R. Jain, R. Kamran, C. Giritharan, and S. Gupta, “Analog domain radius directed equalizer for self-homodyne 16 QAM systems,” Photonics 2018, IIT Delhi, December 2018.
  • R. Ashok and S. Gupta, “Analog domain Costas loop based carrier phase synchronization for DP-16QAM optical links,” Photonics 2018, IIT Delhi, December 2018.
  • S. Chugh and S. Gupta, “Optical MIMO transmission using random mode excitation in a multimode fiber,” Photonics 2018, IIT Delhi, December 2018.
  • R. Sivaramakrishna, A. Mukherjee, G. Tiwari and S. Gupta, “A Wide Operating Range Seamlessly Tunable mmWave LC-QVCO with Selective Frequency Mode” IEEE IMaRC, Kolkata, India, November 2018.
  • R. Kamran and S. Gupta, “Demonstration of polarization diversity based SH-QPSK System with PSK modulated carrier,” SPCOM 2018, IISc Bangalore, July 2018.
  • G. Tiwari, R. Sivaramakrishna, and S. Gupta, “On Optimization of Miller Divider with Transformer Injection Enhancement,” IEEE MTT-S International Wireless Symposium, Chengdu, China, May 2018.
  • S. Goyal, R. Joseph, and S. Gupta, “A PAM-4 10S/12S Line Coding Scheme with Equi-Probable Levels,” IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, May 2018.
  • P. Maheshwari, P. K. Sadhu, M. Deharia, N. Nambath, and S. Gupta, “A Quadrature-Phase Voltage Controlled Oscillator for Offset Phase and Frequency Compensation,” 31st International Conference on VLSI Design, Pune, India, January 2018.
  • R. Kamran, N. Thaker, M. Anghan, N. Nambath, and S. Gupta, “Demonstration of a Polarization Diversity Based SH-QPSK System with CMA-DFE Equalizer,” 2017 26th Wireless and Optical Communication Conference (WOCC), Newark, New Jersey, USA, April 2017.
  • N. Nambath, M. Anghan, N. Thaker, R. Ashok, R. Kamran, A. K. Mishra, and S. Gupta, “First Demonstration of an All Analog Adaptive Equalizer for Coherent DP-QPSK Links,” 2017 Optical Fiber Communication Conference (OFC), Los Angeles, California, USA, March 2017.
  • M. U. Shaikh, R. Sivaramakrishna, N. B. Thaker, and S. Gupta, “Frequency Enhancement in Miller Divider with Injection-locking Portrait,” 30th International Conference on VLSI Design, Hyderabad, India, January 2017.
  • A. Singh, R. Kamran, S. Chugh, and S. Gupta, “Stokes Vector Based Self Coherent Detection for Power Efficient Optical Interconnect,” The International Conference on Fiber Optics and Photonics (Photonics 2016), IIT Kanpur, India, December 2016.
  • R. Kamran, A. Singh, M. Thollabandi, M. Ratwani, and S. Gupta, “Signal Processing Technique for QPSK system with Polarization Multiplexed Carrier,” The International Conference on Fiber Optics and Photonics (Photonics 2016), IIT Kanpur, India, December 2016.
  • R. Ashok, N. Nambath, and S. Gupta, “An SG-DBR Laser Based Carrier Phase Recovery and Compensation Technique for Coherent Optical Receivers,” The International Conference on Fiber Optics and Photonics (Photonics 2016), IIT Kanpur, India, December 2016.
  • R. Sivaramakrishna, S. Emekar, and S. Gupta, “An Optimized CMOS Series-Parallel Coupled LC Quadrature Phase Oscillator,” 2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC’16), Hong Kong, August 2016.
  • M. Ratwani, R. Kamran, N. Nambath, and S. Gupta, “Analog Domain Decision Feedback Equalizer for Repeater-Less DP-QPSK Coherent Optical Links,” The 25th Wireless and Optical Communication Conference, Chengdu, China, May 2016.
  • Y. Patil, A. Sharma, N. Nambath, and S. Gupta, “Analog Processing Based Coherent Optical Receiver for 16-QAM Signals with 12.5 Gbd Baud Rate,” Twenty Second National Conference on Communications (NCC 2016), Guwahati, India, March 2016.
  • H. Sahu, P. Paliwal, V. Yadav, and S. Gupta, “A low-jitter DTC with look-ahead multi-phase DDS,” VII IEEE Latin American Symposium on Circuits and Systems, Florianopolis, Brazil, February 28 to March 2, 2016.
  • P. Paliwal, J. Fadadu, A. Chawda, and S. Gupta, “A Fast Settling 4.7 – 5 GHz Fractional-N Digital Phase Locked Loop,” 29th International Conference on VLSI Design, Kolkata, India, January 2016.
  • S. Anmadwar, N. Nambath, and S. Gupta, “Wideband Active Delay Cell Design for Analog Domain Coherent DP-QPSK Optical Receiver,” 29th International Conference on VLSI Design, Kolkata, India, January 2016.
  • P. Maheshwari, S. Kaushik, M. Sakare, and S. Gupta, “A 12.5 Gbps one-fifth rate CDR incorporating a novel sampler based phase detector and a DFE,” 29th International Conference on VLSI Design, Kolkata, India, January 2016.
  • M. Ratwani, N. Nambath, R. Ashok and S. Gupta, “A Die-On-Board PCB For Testing High-Speed Integrated Circuits,” 5th IEEE Applied Electromagnetics Conference, IIT Guwahati, India, December 2015.
  • R. Ashok, N. Nambath, and S. Gupta, “Differentiator Based Frequency Detector for 100-­Gb/s Analog Domain DP-­QPSK Coherent Optical Receiver,” The 2015 IEEE Workshop on Recent Advances in Photonics, IISc Bangalore, India, December 2015.
  • M. Suthar, A. Singh, K. S. Sanila, F. R. Manzano, K. Appaiah, and S. Gupta, “Silicon Photonics Integrated Circuit for Multi-­Mode Fiber,” The 2015 IEEE Workshop on Recent Advances in Photonics, IISc Bangalore, India, December 2015.
  • N. Nambath and S. Gupta, “A Novel Frequency Detector for DP-QPSK Receivers Using Sine-­Cosine Sampling Method,” The 2015 IEEE Workshop on Recent Advances in Photonics, IISc Bangalore, India, December 2015.
  • S. Jagtap, D. Sharma, and S. Gupta, “Design of SET tolerant LC oscillators using distributed bias circuitry,” 26th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Toulouse, France, October 2015.
  • M. U. Shaikh, R. Sivaramakrishna, A. Nanaware, and S. Gupta, “A wide frequency range series-parallel coupled quadrature phase injection locked frequency divider,” IEEE 58th International Midwest Symposium on Circuits and Systems, Fort Collins, CO, USA, August 2015.
  • R. K. Raveendranath, N. Nambath, and S. Gupta, “Frequency Detector for Carrier Phase Synchronization in 50 Gbps QPSK Receiver in Analog Domain,” 2015 IEEE International Broadband and Photonics Conference, Bali, Indonesia, April 2015.
  • N. Nambath and S. Gupta, “Continuous time CMA equalizer for low power terabit/second optical interconnects,” Optical Interconnects Conference 2015, San Diego, CA, USA, April 2015.
  • R. Sivaramakrishna, S. Jagtap, M. U. Shaikh, and S. Gupta, “A Wide Tuning Range LC Quadrature Phase Oscillator Employing Mode Switching,” 28th International Conference on VLSI Design, Bangalore, India, January 2015. [Nominated for best paper award]
  • A. Chawda, P. Paliwal, and S. Gupta, “High Resolution Digital-to-Time Converter for Low Jitter Digital PLLs,” 21st IEEE International Conference on Electronics Circuits & Systems, Marseille, France, December 2014.
  • N. Nambath and S. Gupta, “Low Power Terabit/Second Optical Interconnects for Data Centers,” International Conference on Signal Processing and Communications, IISc Bangalore, India, July 2014.
  • M. Sakare and S. Gupta, “A High-Speed PRBS Generator Using Flip-Flops Employing Feedback for Distributed Equalization,” IEEE International Symposium on Circuits and Systems, Melbourne, Australia, June 2014.
  • S. Jagtap, R. Sivaramakrishna, and S. Gupta, “Design of Radiation Hardened Wide Tuning Range CMOS Oscillators,” International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, USA, March 2014.
  • R. Sivaramakrishna and S. Gupta, “On dependence of amplitude noise versus offset frequency in LC oscillators,” 27th International Conference on VLSI Design, Mumbai, India, January 2014.
  • P. Paliwal, P. Laad, M. Sattineni, and S. Gupta, “Tradeoffs Between Settling Time and Jitter in Phase Locked Loops,” IEEE 56th International Midwest Symposium on Circuits and Systems, Columbus, OH, USA, August 2013.
  • N. Nambath, A. Gupta, and S. Gupta, “A Low Power 100 Gbps DP-QPSK Receiver Using Analog Domain Signal Processing,” International Conference on Computing, Networking and Communications, Signal Processing for Communications Symposium, San Diego, CA, USA, January 2013.
  • M. Sakare, M. Singh, and S. Gupta, “A 4 × 20 Gb/s 29-1 PRBS Generator for Testing a High-Speed DAC in 90nm CMOS Technology,” 16th VLSI Design And Test Symposium, IIT Kharagpur, India, July 2012.
  • A. Gupta, N. Nambath, and S. Gupta, “Analog Processing Based Carrier Phase Recovery and Equalization for Coherent Optical Receivers”, International Conference on Signal Processing and Communications, IISc Bangalore, India, July 2012.
  • P. K. Moyade, N. Nambath, A. Ansari, and S. Gupta, “Analog Processing Based Equalizer for 40 Gbps Coherent Optical Links in 90 nm CMOS,” 25th International Conference on VLSI Design, Hyderabad, India, January 2012.
  • M. Singh and S. Gupta, “Buffer Design and Eye-Diagram Based Characterization of a 20 GS/s CMOS DAC,” 25th International Conference on VLSI Design, Hyderabad, India, January 2012.
  • M. Singh, M. Sakare, and S. Gupta, “Testing of High-Speed DACs using PRBS Generation with `Alternate-Bit-Tapping`,” DATE Conference, Grenoble, France, March 2011.
  • A. Motafakker-Fard, S. Gupta, and B. Jalali, “Broadband Linearization and its Application to Photonic Time-Stretch ADC,” IEEE International Topical Meeting on Microwave Photonics, Montreal, Canada, October 2010.
  • A. Motafakker-Fard, S. Gupta, and B. Jalali, “Eye Diagram Measurements and Equalization with Real-time Burst Sampling,” IEEE I2MTC Conference, Austin, TX, USA, May 2010.
  • J. Yu, X. Zhou, Y.-K. Huang, S. Gupta, M.-F. Huang, T. Wang, P. Magill, “112.8-Gb/s PM-RZ-64QAM Optical Signal Generation and Transmission on a 12.5GHz WDM Grid,” IEEE/OSA Optical Fiber Communication (OFC) Conference, March 2010.
  • A. Motafakker-Fard, S. Gupta, and B. Jalali, “Digital Equalization of Ultrafast Data Using Real-Time Burst Sampling,” IEEE/OSA Optical Fiber Communication (OFC) Conference, March 2010.
  • S. Gupta, G. C. Valley, R. H. Walden, and B. Jalali, “Power Scaling in Photonic Time-Stretched Analog-to-Digital Converters,” IEEE Avionics, Fiber-Optics and Photonics Conference, September 2009.
  • S. Gupta and B. Jalali, “Impulse Response of the Photonic Time-Stretched Analog-to-Digital Converter,” IEEE Avionics, Fiber-Optics and Photonics Conference, September 2009.
  • S. Gupta, D. Solli, A. Motafakker-Fard, and B. Jalali, “Capturing Rogue Events with the Time-Stretch Recording Scope,” IEEE/OSA CLEO/Europe - EQEC, June 2009.
  • S. Gupta, R. E. Saperstein, Y.-K. Huang, P. N. Ji, A. Dogariu, and T. Wang, “Ultra High-Speed, Multi-Wavelength Polarization Impairment Characterization Technique for Pol-Muxed Optical Links,” IEEE/OSA Optical Fiber Communication Conference, March 2009.
  • A. Motafakker-Fard, S. Gupta, and B. Jalali, “Dynamic Range Improvement in Photonic Time-Stretch Analog-to-Digital Converter,” IEEE/OSA Optical Fiber Communication Conference, March 2009.
  • S. Gupta and B. Jalali, “Photonic Time Stretch Enhanced Recording Scope,” The 21st Annual Meeting of The IEEE Lasers & Electro-Optics Society, paper #ThJ3, November 2008.
  • S. Gupta, O. Boyraz, and B. Jalali, “Dispersion Penalty Mitigation Using Polarization Mode Multiplexing in Phase Diverse Analog Optical Links,” IEEE/OSA Optical Fiber Communication Conference, March 2008.
  • G. C. Valley, J. Conway, J. Chou, G. A. Sefler, S. Gupta, and B. Jalali, “Bandwidth compression optical processor using chirped fiber Bragg gratings,” Controlling Light with Light: Photorefractive Effects, Photosensitivity, Fiber Gratings, Photonic Materials Conference, Paper #TuB6, Olympic Valley, CA, October 2007.
  • S. Gupta, J. Stigwall, S. Galt, and B. Jalali,``Demonstration of distortion suppression in photonic time-stretch ADC using back propagation method,” IEEE International Topical Meeting on Microwave Photonics, Victoria, BC, Canada, October 2007.
  • J. Chou, S. Gupta, and B. Jalali, “10 Tera sample-per-second single-shot real-time digitizer'' IEEE MTT-S International Microwave Symposium, Workshop WMK7, Honolulu, HI, USA, June 2007.
  • S. Gupta and B. Jalali, “2nd Order distortion cancellation in photonic time stretch analog-to-digital converter,” IEEE MTT-S International Microwave Symposium, Honolulu, HI, USA, June 2007.
  • E. R. Brown, A. C. Cotler, S. Gupta, and A. Umali, “First demonstration of a retrodirective noise-correlating radar in S band,” IEEE MTT-S International Microwave Symposium, Fort Worth, TX, USA, June 2003.
  • S. Gupta and E. R. Brown, “Retro-directive Noise Correlation Radar with Extremely Low Acquisition Time,” IEEE MTT-S International Microwave Symposium Digest, Philadelphia, PA, USA, June 2003.


Preprints/Technical Reports

  • S. Gupta, “Automatic Analog Beamforming Transceiver for 60 GHz Radios,” E-print archive: arXiv:0901.2771v1 (2009).
  • S. Gupta, G. C. Valley, R. H. Walden, B. Jalali, “Power Scaling in High Speed Analog-to-Digital Converters using Photonic Time Stretch Technique,” E-print archive: arXiv:0901.2767v1 (2009).
  • C. Pereira, V. Raghunathan, S. Gupta, R. Gupta, and M. Srivastava, “A Software Architecture for Building Power Aware Real Time Operating Systems,” Technical Report #02-07, UC Irvine, March 14, 2002.

Patents (to be updated)

  • S. Gupta, M. Singh, and M. Sakare, Methods for characterizing high speed DACs using multi level signals, patent application.
  • S. Gupta, N. P. Nandakumar, A. Gupta, and P. K. Moyade, Coherent Receiver based on Analog Domain Signal Processing, patent application.
  • M. Sakare, S. Gupta, and S. P. Kumar, Circuit for improving clock rates in high speed electronic circuits using feedback based flip-flops, patent application.
  • S. Gupta and P. Maheshwari, Clock alignment and deserializer circuit with samplers incorporating decision feedback equalization, patent application.

Contact Information

Department of Electrical Engineering
IIT Bombay, Powai
Mumbai 400076, India
Office Location: EE Building, Room# 118
Email: firstname [AT] ee.iitb.ac.in
Phone: +91-22-2576-7499 (O); +91-22-2576-8499 (R);
Fax: +91-22-2572-3707
Web: http://www.ee.iitb.ac.in/~shalabh


faculty/shalabh.txt · Last modified: 2022/04/22 17:56 by Dr. Shalabh Gupta