**Date of birth:**Oct 29, 1943**Place of birth:**Jhabua, Madhya Pradesh, India

**Visiting Researcher**(1993) University of South Australia, Adelaide**Post-Doctoral Fellow**(1983-1985) Concordia University, Montreal, Canada,**Ph D**(by research on Passive and Active Circuits),(1976) Indore University**M E**(Applied Electronics & Servomechanisms):(1970) Indore University**B Sc**(Electrical Engineering):(1965) Indore University

**Visiting Professor**:(2017-2019) IIT Goa, Goa**Dean (R&D) & HOD**:(2006-2014) Electronics & Telecommunication Engineering, S F Institute of Technology (SFIT), Borivali, Mumbai**Prof**:(1986-2006) IIT Bombay, Mumbai**Asst Prof**: (1978-1986) IIT Bombay, Mumbai**Reader**: (1976-1978) G S Inst of Tech & Science, Indore**Lecturer**: (1968-1976) G S Inst of Tech & Science, Indore**Associate Lecturer**: (1965-1968) G S Inst of Technology & Science, Indore

- Digital Measurement Techniques
- Network Synthesis
- Basic Electrical Engineering
- Basic Electronics
- Measurements and Measuring Instruments
- Analog Electronics
- Digital Electronics
- Integrated Circuits

- Analysis and Synthesis of Networks
- Electronic Circuit Design
- Switched-Capacitor Filters
- Electronic-Aided Instrumentation
- Hartley Transform
- Analog to Digital and Digital to Analog Converters
- Properties of integer numbers

- Life Senior Member of IEEE (USA)(04291308)
- Life Fellow of IETE (India) (049768)
- Life Fellow of IE (India)(F101608/5)
- Life Member of ISTE (India), (LM8345)
- Life Member of Instrument Society of India (LM1396)
- Life Member of Computer Society of India (00173931)
- Life Member IIST (M457)
- Listed in: Asia's Who's Who of Men & Women of achievement, vol. 6, 1991.

**Tejmal Rathore**, Versatile all-pass filter circuits, IETE J. Education, 2024, https://doi.org/10.1080/09747338.2023.2299862**T. S. Rathore**, Limitation of the Pothayanar Formula for finding the hypotenuse of a right-angle triangle, https://doi.org/10.1080/09747338.2023.2292616**Tejmal Rathore**, Generalized Collatz's conjecture, IETE J. Education, vol. 64, no. 2, pp. 98-102, 2023, DOI:-10.1080/09747338.2023.2178531**Tejmal Rathore**, Higher length necklaces from lower ones when the absolute value of the difference of two adjacent beads belongs to a set of integers, IETE Journal of Education, vol.64, no. 1, pp. 61-65, DOI: 10.1080/09747338.2023.2178529**Tejmal Rathore**, Chains/Necklaces for a wide range of algebraic operations on the two consecutive numbers restricted to a specified set of numbers, Research Inventy: Int. J. of Engineering and Science, vol. 12, no. 8, pp. 01-04, 2022.**Tejmal Rathore**, Chain-necklace diagrams with the sum of two consecutive numbers a perfect cube, AKGEC Int. J. of Technology, vol. 13, no. 2, pp. 40-50, 2022**T. Rathore**, “Arranging integer numbers on a loop such that the sum of any two adjacent numbers is a perfect square,” 2022 IEEE Region 10 Symposium (TENSYMP), 2022, pp. 1-6, doi: 10.1109/TENSYMP54529.2022.9864484.**Tejmal Rathore**, A note on the minimum number of loops, IETE Journal of Education, vol. 63, no. 2, pp. 95-99, 2022. DOI: 10.1080/09747338.2022.2077242.**T. S. Rathore**, P. Bhatnagar and J. L. Rathore, Total resistance and total capacitance of two-element kind of driving point functions, IETE J Research, 2022, DOI: 10.1080/03772063.2022.2063954**T. S. Rathore**, Loop analysis of circuits with non-convertible current sources, IETE J. Education, vol. 62, no. 2, pp. 89-94, 2021, https://doi.org/10.1080/09747338.2021.1960206**T. S. Rathore**, Mradul Rathore, Jayantilal Rathore, and Pramila Khabia, Some properties of integer numbers, AKGEC Int. J. of Technology, vol. 13, no. 1, pp. 45-50, 2021.**T. S. Rathore**, Voltage and current mode filter realizations using active devices, AKGEC Int. J. Technology, vol. 12, no. 1, pp. 9-16, Jan-June 2021**T. S. Rathore**and Prasoon Vishwakarma, Realizations of conventional and inverse voltage transfer functions, Int J Electronics and Communication Engineering, vol. 8, no. 9, pp. , 2021**T. S. Rathore**and Prasoon Vishwakarma, Single CDBA realization of inverse filters, Int J Electronics and Communication Engineering, vol. 8, no. 8, pp. 1-3, 2021**T S Rathore**, Synthesis of some specific types of voltage/current transfer functions with minimum number of passive elements and one active device, IETE J Research, 2021.DOI: 10.1080/03772063.2021.1919221**T. S. Rathore**, Amplitude Equalizers – Types and Design, AKGEC Int. J. Technology, vol. 11, No. 2, pp. 22-32, 2021**T. S. Rathore**and J. L. Rathore, Multiplication counts in solving linear equations, IETE J Education, vol. 62, no. 1, pp. 37–43, 2021**T. S. Rathore**, U P Khot and Prasoon Vishvkarma, A better design of quadrature oscillator using OTRAs, Int J Electronics and Communication Engineering, vol. 8, no. 7, pp. 11-13, 2021**T S Rathore**, Conversion of a first order all-pass filter into variable magnitude equalizer, Int J Electronics and Communication Engineering, vol. 8, no. 3, pp. 10-12, 2021.**T S Rathore**, Novel current-mode amplitude equalizers, Int J Electronics and Communication Engineering, vol. 8, no. 3, pp. 1-2, 2021.**T. S. Rathore**, Novel realizations of current mode transfer functions, Int J Electronics and Communication Engineering, vol. 8, no. 3, pp. 3-7, 2021.**T. S. Rathore**and K. S. Sanila, A comparison of two methods for realizing minimal function of several logic variables, Int J. Electronics and Communication Engineering, vol. 8, no. 1, pp. 6-11, 2021.**T. S. Rathore**, Minimal realizations of logic functions, Int J. Electronics and Communication Engineering, vol. 8, no. 1, pp.24-27, 2021.**T S Rathore**, Realizations of DVCC based current transfer functions, Int J Electronics and Communication Engineering, vol. 7 no. 12, pp.8-10, 2020**T. S Rathore**, Determination of loop currents by loop elimination method, IETE J Edn, 2020**T S Rathore**and Prasoon Vishvkarma, NNDD to NDD transformation and its applications, IEOR Int J Mathematics, 2020.**T S Rathore**, Sunil Kumar Jonwal and K Jayasudha, Determination of input impedance of two terminal networks, 3rd International Conference (CSCITA) on Communication Systems, Mumbai, India, April 3-4, 2020.**T S Rathore**, Realizations of CDTA-based current transfer functions, Int J. Circuits, Systems and Signal Processing, vol. 38, no. 9, pp. 4331–4337, September 2019**T. S. Rathore**and K. S. Sanila, An Improved Time-Division Analog Multiplier, IETE J. Education, vol. 60, no. 1, pp. 8–13, 2019, https://doi.org/10.1080/09747338.2019.1573155**T S Rathore**, A generalized inverted ladder digital to analog converter, Int J Circuits, Systems and Signal Processing, vol. 38, no. 3, pp. 1374–1384, March 2019.**T S Rathore**, Circuit theorems – Scope and limitations, AKGEC Int. J. of Technology, Part III: vol 10, no. 1, Jan-June 2019**T S Rathore**, Realizations of voltage transfer functions using DVCCs, Int J. Circuits and Systems, vol. 9, pp. 141-147, 2018**T S Rathore**, Circuit theorems – Scope and limitations, AKGEC Int. J. of Technology, Part II: vol 9, no. 1, pp. 1-11, Jan-June 2018**T S Rathore**, Equal-valued resistive ladders with rational input resistance, IETE J Education, 59, no. 01, pages 35-38, Jan-June 2018**T S Rathore**, Circuit theorems – Scope and limitations, AKGEC Int. J. of Technology, (Best paper in the issue), Part I: vol 8, no. 2, pp. 1-10, July-Dec 2017**T S Rathore**, Design of digital to analog converters with arbitrary radix, special issue of Int J on Circuits and Systems on ‘Circuit Principles and Circuit Design’ Int. J. Circuits and Systems vol. 09, no. 03, pp. 49-57, Feb 2018.**T. S. Rathore**, A systematic method for finding the input impedance of two-terminal networks, IETE J of Education, vol. 58, no. 02, pp. 83-89, 2017**T. S. Rathore**, Synthesis of networks from their loop and node analysis based matrices, IETE J. Education, vol. 58, pp. 50-55, 2017, https://doi.org/10.1080/09747338.2017.1360157**T. S. Rathore**and J L Rathore, Star ↔ Delta Transformation in the Presence of Sources, IETE J. Education, vol. 58, pp. 67-77, 2017, https://doi.org/10.1080/09747338.2017.1384331**T. S. Rathore**, Generalized maximum power transfer theorem, IETE J of Education, vol. 58, no. 1, pp. 39-41, 2017**T S Rathore**, Synthesis and classification of LC oscillators, IEEE approved Int Conf on Circuits, Systems, Communication and Information Technology Applications, CSCITA 2017, April 3-4, 2017, IEEE Xplore Digital Library, pp. 2017**T S Rathore**, A Family of LC Oscillators. Int. J. of Innovative Studies in Sciences and Engineering Technology, vol 2, no 12, pp. 6-11, Dec 2016**T. S. Rathore**, A family of compensated amplifiers for high frequency applications, Intl J of Innovative Studies in Sciences and Engineering Technology, vol. 2, nol. 12, pp. 55-60, Dec 2016**T. S. Rathore**, Active circuits for measuring quality factor and dissipation factor, IETE J of Education, vol. 57, no. 1, pp, 25-30, Jan-July 2016**T. S. Rathore**, Identifying the loops in mesh analysis, IETE J of Education, vol. 56, no. 2, pp. 55-58, July-Dec 2015**T S Rathore**, Improved scheme for measuring power factor and phase, IETE Journal of Education, vol. 56, no. 2, pp. 40-42, July-Dec 2015**T. S. Rathore**, A Common Circuit Topology for Measuring Quality Factor and Dissipation Factor, IETE Journal of Education, vol. 56, no. 2, pp. 76-81, July-Dec 2015**T. S. Rathore**, Digital measurement of quality and dissipation factors using voltage ratio meter, IETE Journal of Education, vol. 55, no. 02, pp. 64-68, Feb 2015**T. S. Rathore**, Thevenin equivalents of some interesting networks with dependent sources, IETE Journal of Education, vol 55, no 01, pp 3–10, Sep 2014**T S Rathore**, Minimal realizations of logic functions using truth table method with distributed simplification, IETE J of Education, vol. 55, no. 01, pp. 26-32, Sep 2014- Divyang D Vyas and
**T S Rathore**, VLSI design of active filters, IEEE approved Int. Conf. on Circuits, Systems, Communication and Information Technology Applications, CSCITA, IEEE Xplore Digital Library, pp. 1-6, April 3-4, 2014 **T. S. Rathore**and Ashish Jain, A systematic map method for realizing minimal logic functions of arbitrary number of variables, IEEE approved Int Conf on Circuits, Systems, Communication and Information Technology Applications, CSCITA, April 3-4, 2014, IEEE Xplore Digital Library, pp. 36-41, 2014**T. S. Rathore**and Jayantilal Rathore, Analysis of a typical 3-phase star-connected circuit: A phasor diagram approach, IEEE approved Int Conf on Circuits, Systems, Communication and Information Technology Applications, CSCITA, April 3-4, 2014, IEEE Xplore Digital Library, pp. 81-86, 2014**T S Rathore**, Forward and reverse conversions of multi-valued logic numbers, IEEE approved Int Conf on Circuits, Systems, Communication and Information Technology Applications, CSCITA, April 3-4, 2014, IEEE Xplore Digital Library, pp. 87-92, 2014**T. S. Rathore**, Conditions for the maximum power transfer, IETE J Education, vol. 54, no. 2, pp. 61-74, July-Dec 2013**T. S. Rathore**, Thevenin equivalents of some interesting circuits, IETE J Education, vol. 53, no. 1, Jan-June 2012**T S Rathore**, NDD functions: Properties and applications’, IETE J Education, July-Dec 2012**T S Rathore**, Some remarks on the Paper ‘Shadow filters – A New family of electronically tunable filters’, IETE J Education, vol. 53, no. 1, p. 20, Jan-July 2012**T S Rathore**and Ashish Jain, A computerized method for determination of the driving point resistance, Int J Engineering and Technology, Dec 2012**T S Rathore**, K Jayasudha, and Sunita Sharma, Analysis of electrical circuits with controlled sources through the principle of superposition, Int J Engineering and Technology, vol. 4, no. 3, pp. 109-118, Feb 2012**Tejmal S Rathore**and Uday P Khot, Current conveyor equivalent circuits, 2011- Gautam Abhaychand Shah and
**Tejmal Saubhagyamal Rathore**, A fast radix-4 algorithm and architecture for DHT, Int. J Comp Sci. Emerging Tech, vol. 2, no 5, pp 270-279, October, 2011 - Gautam A Shah and
**Tejmal S Rathore**, An analog architecture for split-radix DHT, Int J Computer Applications (0975 – 8887), vol 30, no 4, pp 24-31, Sept 2011 **T S Rathore**, A single op amp digitally programmable circuit for minimal realization of arbitrary gains, International Journal of Engineering and Technology, vol. 3, no. 3, pp. 244-249, 2011**Tejmal S Rathore**and Uday P Khot, Design of Bode-type amplitude equalizers with the specified shaping function and whole range, 2011- A A Shinde and
**T S Rathore**, Hysteresis circuits and their realizations, International Journal of Engineering and Technology, vol. 3, no. 6, pp. 387-397, 2011 **T S Rathore**, A simple circuit for digital impedance measurement, 2011**T S Rathore**, Fast Digital Measurement of Low Frequencies in a Narrow Band, Int J of Engg and Tech, vol. 3, no 3, pp 244-249, 2011**T. S. Rathore**and G A Shah, Matrix approach: Better than applying Miller’s equivalents, IETE J Edn, July 2010- G. A. Shah and
**T. S. Rathore**, A new analog block architecture for computing Radix 2 DHT, IEEE Int Conf on Computational Intelligence and Communication Networks CICN 2010, Rajiv Gandhi Prodyogiki Vishwavidyalaya, Bhopal, Nov 26-28, 2010 **T S Rathore**, Miller theorem – Scope and limitations, National Conference on Mathematical Techniques: Emerging Paradigms for Electronics and IT Industries (MATEIT 2010), University of Delhi, Jan 30-31, 2010**T S Rathore**, Applications of timer integrated circuits, IETE J Edn, vol 51, no 1, pp 33-52 , Jan-April 2010**T. S. Rathore**and U. P. Khot, A new micro-meter displacement sensor, J Instrument Society of India, vol 40, no 03, pp 168-169, Sept 2010**T S Rathore**and G A. Shah, Miller equivalents and their applications, Int J Circuits, Systems and Signal Processing, July 2009- G A Shah and
**T S Rathore**, a new fast radix-2 decimation in frequency algorithm for computing the DHT, 1st Int Conf on Computational Intelligence Communication Systems and Networks - Image, Speech and Signal Processing, CICSyN 09, Indore, July 23-25, 2009 - D D Vyas and
**T S Rathore**, Improved scheme for time multiplexing of SCs, Int J Emerging Technologies and Applications in Engineering, Technology and Science, vol 2, no 2, pp 12-15, July 2009-Dec 2009 **T S Rathore**and U P Khot, CFA-based grounded capacitor operational simulation of ladder filters, Int J Circ Theory Appl, vol 36, pp 697-716, 2008**T S Rathore**and G A Shah, Design, development and applications of PC-based process control trainer for automation, IETE Tech Review, 25, 29-37, Jan-Feb 2008- G A Shah and
**T S Rathore**, Location-Based Method for Computing the Elements of the Discrete Hartley Transform Matrix, 14th National Conference on Communications, NCC-2008, IIT Bombay, Mumbai, Feb 1-3, 2008 **T S Rathore**, Source Transformation Theorem Revisited, IETE J Education, vol. 49, no. 1, pp. 13-17, Jan April, 2008**T S Rathore**and U P Khot, Design of active RC variable equalizers, TENCON-08, IEEE Region 10 Conference, University of Hyderabad, Hyderabad, Nov 19-21, 2008**T S Rathore**and U P Khot, Single OTRA realization of transfer functions, IE (I), J. ET, vol. 89, pp. 33-38, 2008.**T S Rathore**, One-circuit and one-step evaluation of the Thevenin equivalent circuit, IETE J Education, vol. 48, no. 1, pp. 9-12, Jan-March 2007**T S Rathore**and U P Khot, EVGC realizations of low-pass filters, Proc Int Conf on Sensors, Signal Processing, Communications, Control and Instrumentation, pp 334-337, VIT, Pune, Jan 3-5, 2007**T S Rathore**& U P Khot, A new micro-meter displacement sensor, Int Conf on Sensor Technology, ICST 2005, Palmerston North, New Zealand, pp 454-459, Nov 21-23, 2005.**T S Rathore**, Weighted-resistor current digital-to-analog converters, IETE J Research, vol 51, no 4, pp 267-272, July-Aug 2005**T S Rathore**and U P Khot, Single FTFN realization of current transfer functions, IETE J Research, vol 51, no 3, pp 193-199, May-June 2004**T S Rathore**and U P Khot, Analysis of resistor, diode and source networks, IETE J Education, vol. 45, no. 2, pp. 89-96, April-June 2004**T S Rathore**and A Jain, Abundance of ladder digital to analog converters, IEEE Trans Instru Meas, vol 50, pp 1445-1449, Oct 2001- Ashish Kothari, P C Pandey and
**T S Rathore**, A micro-controller based dB meter, IETE J Res, vol 47, pp 165-168, May-Aug 2001 - Sunita Sharma and
**T S Rathore**, A synchronous sampling power meter, IETE Seminar on Trends in Electronics, Communication and Information Technology, Navi Mumbai, March 18-19, 2000 **T S Rathore**and A Jain, Abundance of ladder digital to analog converters, Proc. 16th IEEE Instrum. Meas. Tech. Conf., Venice, pp 515-520, May 24-26, 1999**T S Rathore**, Optimized weighted resistor digital to analog converter, IEE Proc (Circuits, Devices and Syst), vol 145, pp 197-200, June 1998**T S Rathore**, Galvanometer responses through Laplace transform, IETE J Education, vol. 38, Nos. 3-4, pp. 225-229, July-Dec 1997**T S Rathore**, A systematic derivation of analog to digital converters, Student J IETE(I), vol. 37, no. 4, pp. 227-230, Oct-Dec 1996**T S Rathore**and L C Jain, Programmable gain amplifiers, J IETE (India), vol 41, pp 277-284, Sept-Dec 1995**T S Rathore**and L C Jain, Economical and accurate digitally programmable dual-polarity gain amplifier, Active and Passive components, Amsterdam, B V, vol 18, pp 203-210, 1995**T S Rathore**and S Kumar, A generalized digital to analog converter, 38th Mid-West Symp Circuits and Syst, Rio de Genario, Aug 1995**T S Rathore**and L C Jain, Timer-based astable circuits without the first cycle timing error, IETE Tech Review, vol 12, pp 37-38, Jan-Feb 1995**T S Rathore**, A new timer-based retriggerable monostable and its applications, J IE (I), vol 73, pp 166-167, Feb 1993**T S Rathore**, Timer 555 with dual supply, IETE (I) Students' J, vol 34, pp 85-90, April-June 1993**T S Rathore**, An undergraduate course on Analog Electronics, 11th Australian Micro-Electronics Conf, Queensland, Sept-Oct 1993**T S Rathore**, A fast general radix algorithm for discrete Hartley transform, Proc Int Conf Signals, data, Systems, Methodologies and Applications, Calcutta, pp 161-172, Dec 1992**T S Rathore**, Sampling theory and its instrumentation applications, Inst Engrs(I) ET-72, pp 117-121, Feb 1992- J S Rathore and
**T S Rathore**, An improved voltage to time converter, J IE (I), vol ET-72, pp 113-114, Feb 1992 **T S Rathore**, B B Bhattacharyya and S M Faruque, Binary-weighted charge transfer type switched-capacitor digital to analog converter, Inst Engrs(I) 72, pp 115-116, Feb 1992**T S Rathore**, Invited paper: Hartley transform - Properties and algorithms, National Conf on Real Time Syst, Indore, pp 21-30, Feb 1991- J S Rathore, S N Nagaraja and
**T S Rathore**, Computer study of automatic load shading employing frequency and rate of change of frequency relays, Proc VI National Conf Power Syst for the year 2000 and beyond, Tata McGraw-Hill, pp 519-526, June 1990 **T S Rathore**, Comments on 'New floating point impedance simulation using operational amplifiers, IEE Proc (Pt G), vol 136, 1989**T S Rathore**, Generalized Miller theorem and its applications, IEEE Trans Education, vol. 32, no. 3, pp. 386-390, Aug 1989**T S Rathore**, Recursive relations for complexities of Hartley transform algorithms, Inst Engrs(I)TE, vol. 35, no. 6, pp. 357-359, Nov-Dec 1989**T S Rathore**and B B Bhattacharyya, Derivation of sinusoidal oscillators through network transformations, Inst Engrs (I), TE-34, no 6, pp 455-457, Dec 1988**T S Rathore**, Some new sinusoidal oscillators, Inst Engrs (I) TE 34, no 2, pp 150-152, April 1988**T S Rathore**and B B Bhattacharyya, A systematic approach to the design of stray-insensitive SC circuits from active-RC or RLC prototype, Int J Circuit Th Appl, vol 15, pp 371-389, Oct 1987**T S Rathore**, N S Joshi and S V Chitale, Digital max/min indicator, IEEE Trans Instum Meas, 36, no 3, p 851, Sept 1987- B B Bhattacharyya &
**T S Rathore**, An economical digitally programmable SC biquad, J Solid State Circuits, vol SC-22, no 4, pp 627-629, Aug 1987 **T S Rathore**, S M Faruque and B B Bhattacharyya, A stray-insensitive switched-capacitor biquad with reduced number of capacitors, Inst Engrs(I)TE 33, no 3, pp 75-81, May-June 1987**T S Rathore**and B B Bhattacharyya, Systematic approach to the time-multiplexing of stray-insensitive SC networks, IEE Proc (Pt G), vol 134, no 2, pp 83-94, April 1987**T S Rathore**, S M Faruque and B B Bhattacharyya, A stray-insensitive single switched capacitor ladder realization of an arbitrary order low-pass filter, IEEE Proc, vol 75, no 1, pp 168-169, Jan 1987**T S Rathore**, C S Ravishankar and K Shivkumar, A new method for digital measurement of modulation index, IETE (Pune Centre) Symp., Nov. 1986**T. S. Rathore**and B. B. Bhattacharyya, Stray-insensitive active SC realization of high order filters with reduced number of components, IEEE Int Symp Circuits Syst, San Jose, California, May 1986**T S Rathore**, A zero shifting technique and its applications, IETE (India) Technical Review, vol 2, no 7, pp 231-237, July 1985- P K Chande, K R Pai and
**T S Rathore**, A microprocessor based ultrasonic flow velocity measurement system, 34, no 3, pp 456-458, Sept 1985 **T S Rathore**, Improved temperature to frequency converters, 34, no 11, pp 90-92, March 1985 Corrections: ibid, vol IM-34, no 3, p 477, Sept 1985**T S Rathore**, Theorems on power, mean and RMS value of uniformly sampled periodic signals, IEE Proc (Pt A) (Physical Science, Measurement and Instrumentation, Management and Education, Reviews), vol 131, no 8, pp 598-600, Nov 1984. Erratum: ibid, vol 132, no 9, p 98, Mar 1985**T S Rathore**and B B Bhattacharyya, A new type of analog multiplier, IEEE Trans Ind Electron, vol IE-31, pp 268-271, Aug 1984**T S Rathore**, A versatile astable multivibrator, IEEE Trans Ind Electron, vol IE-31, no 2, pp 157-158, May 1984**T S Rathore**and L S Mombasawala, An accurate digital phase measurement scheme, Proc IEEE, vol 72, no 2, pp 397-399, March 1984.**T S Rathore**, A digital exponential generator, Int J Electron 56, no 2, pp 273-274, Feb 1984**T S Rathore**and K R Pai, Linearly-controlled duty-cycle circuits, Inst Engrs(I)TE 29, no 1, pp 35-36, Jan 1983**T S Rathore**, Compensated integrators for high frequency applications, Int Circuit Th Appl, vol 11, no 1, pp 99-106, Jan 1983**T S Rathore**, Multiport impedance converters and their applications, India J Tech, vol 21, pp 32-34, Jan 1983**T S Rathore**, Digitally controlled amplifiers with few number of resistors and sensitivities, Electron Lett, vol 19, no 6, pp 646-647, Aug 1983**T S Rathore**, A new four quadrant analogue multiplier, Int J Electron 55, no 3, pp 491-493, Sept 1983**T S Rathore**& K R Pai, Voltage-controlled duty-cycle circuits, Inst Engrs(I)TE 28, no 10, pp 518-519, Oct 1983**T S Rathore**and P P Kumar, A voltage to frequency converter with adjustable duty cycle, Inst Engrs(I) 64, pp 36-37, Dec 1983**T S Rathore**and R M Inamdar, A new exponential generator, Int J Electron 55, no 6, pp 881-882, Dec 1983**T S Rathore**, A voltage divider circuit with digital output, Int J Electron 53, No 3, pp 293-296, Sept 1982**T S Rathore**, Active RC synthesis of grounded and floating RL impedances employing current conveyors and minimum number of capacitors, Indian J of Technology, vol 20, pp 244-245, June 1982**T S Rathore**, Applications of complementary transformation to NIC compensated amplifier, Electron Lett, vol 18, no 10, pp 400-401, May 1982**T S Rathore**, A four quadrant analog divider with 555 timer device, Int J Electron 52, No 2, pp 195-197, Feb 1982**T S Rathore**and B M Singhi, Voltage transfer function shift theorem, Electron Lett, vol 17, pp 175-176, Feb 1981**T S Rathore**, J S Rathore and B M Singhi, Astable multivibrator with voltage controlled variable duty cycle, Inst Engrs(I)TE 27, pp 23-24, Jan 1981**T S Rathore**and B M Singhi, A family of inductance simulations, Inst Engrs(I) 61, pp 58-59, Dec 1980**T S Rathore**, Active complementary networks, Circ and Syst 27, no 12, pp 1278-1280, Dec 1980**T S Rathore**& B M Singhi, Simulation of RL impedances suitable for micro-miniaturization, Int J Microelectronics & Reliability, vol 19, No 3, pp 233-235, Dec 1979**T S Rathore**, Grounded capacitor synthesis of RL impedances based on lagging current concept, Int J Circuit Th and Appl, pp 461-465, 1980**T S Rathore**and B M Singhi, Active RC simulation of floating RL-impedances, Inst Engrs(I)TE 26, no 7, pp 323-324, July 1980**T S Rathore**and B M Singhi, Active cascade synthesis of floating immittances, Inst Engrs(I)TE 26, no 6, pp 277-278, June 1980**T S Rathore**and B M Singhi, Active RC synthesis of floating immittances, Int J Circuit Th and Appl, vol 8, no 2, pp 184-188, April 1980**T S Rathore**, A class of inductance simulations, IETE (I) Symp on Circuits Syst, Madras, March 1980**T S Rathore**, Complementary networks and their applications in filter design, IETE Annual Convention, Delhi, Jan 1980**T S Rathore**and B M Singhi, Network transformations, IEEE Trans. Circ and Syst 27, no 1, pp 57-59, Jan 1980**T S Rathore**and B M Singhi, A new active RC synthesis of voltage transfer functions, IEEE Int Symp Circuits Syst, Japan, July 1979**T S Rathore**, B M Singhi and A V Kibe, Continued fraction inversion and expansion, IEEE Trans Automatic Control, vol AC-24, no 2, pp 349-350, April 1979- B M Singhi and
**T S Rathore**, Inductorless filter design, Inst Engrs(I) 59, ET-2, pp 47-48, April 1979 **T S Rathore**and B M Singhi, A new single capacitor lossless floating inductor simulation, Diamond Jubilee Symp on Optimization of Electrical Apparatus and Syst, BHU, Varanasi, March 1979**T S Rathore**, B M Singhi and N D Somani, Minimal realization of first order RC transfer immittances, IEE Proc, vol 126, no 1, pp 41-42, Jan 1979**T S Rathore**and B M Singhi, Inverse complementary network theorem, IEEE Proc, vol 66, no 9, pp 1083-1084, Sept 1978**T S Rathore**and B M Singhi, An active network transformation, Inst Engrs(I)TE, vol 24, no 8, pp 335-336, Aug 1978**T S Rathore**and B M Singhi, Realization of the operator Zx/Zy, IEE Proc, vol 12, no 8, pp 727-728, Aug 1978**T S Rathore**, B M Singhi and N D Somani, Asymmetrical lattice realization of RC transfer immittances, IEE Proc, vol 125, no 6, pp 501-502, June 1978**T S Rathore**, C M Pauddar and**T S Rathore**, A new time-division analog multiplier employing a monostable multivibrator, Inst Engrs(I) 25, no 2, pp 186-187, May 1978**T S Rathore**, Inverse active networks, Electron Lett, vol 13, No 10, pp 303-304, May 1977- J S Rathore and
**T S Rathore**, A common earth full-wave rectifier, IEE Proc, vol 123, no 12, p 1316, Dec 1976. **T S Rathore**, A new design procedure for inductorless filters, Inst Engrs(I)TE 22, no 12, pp 765-766, Dec 1976**T S Rathore**and S M Dasgupta, Synthesis of RC voltage transfer functions with arbitrary gain constant, IEE Proc vol 123, no 10, pp 986-987, Oct 1976**T S Rathore**, Synthesis procedure for Holt and Gray configuration, IEE Proc, vol 123, no 10, pp 987-988, Oct 1976**T S Rathore**, Synthesis of transfer functions employing Holt and Gray configuration, Electron Lett, vol 12, no 119, pp 488-489, Sept 1976**T S Rathore**, Analog computations using current conveyors, Inst Engrs(I)TE 22, no 8, pp 510-511, Aug 1976**T S Rathore**and S M Dasgupta, A novel active RC realization for a class of biquadratic transfer functions, IEE Proc, vol 123, no 7, pp 683-684, July 1976**T S Rathore**, A few more analog computer simulations of RC voltage transfer functions, IEEE Proc, vol 64, no 4, pp 60-61, April 1976**T S Rathore**and S M Dasgupta, Current conveyor realizations of transfer functions, IEE Proc vol 122, no 10, pp 1119-1120, Oct 1975**T S Rathore**and S M Dasgupta, Active realization of RC transfer function with arbitrary gain constant, IEEE Trans. Circ and Syst 22, no 10, pp 835-836, Oct 1975**T S Rathore**, G P Acharya and S M Dasgupta, Transfer function realization using one fixed gain amplifier, IEE Proc, vol 122, no 7, pp 719-720, July 1975**T S Rathore**and S M Dasgupta, Active realization of any stable voltage transfer function, IEE Proc, vol 122, May 1975**T S Rathore**, Minimal realization of RC voltage transfer functions by unsymmetrical lattice networks, IEEE Trans. Circ. Syst. 22, no 44, pp 313-316, April 1975**T S Rathore**T and S M Dasgupta, Unbalanced active realizations of non-minimum phase RC voltage transfer functions: A simple approach, Int J Electron 38, no 3, pp 349-351, March 1975**T S Rathore**and S M Dasgupta, A class of active realizations derived from lattice networks, IEE Proc, vol 122, no 3, pp 269-270, March 1975**T S Rathore**, Passive and active realizations of RC all-pass voltage transfer functions, Inst Engrs(I) 54, no ET-3, pp 128-130, Aug 1974**T S Rathore**and K S Mehta, Digital phase measurement over a wide band of frequencies, J IIST (I), vol 2, no 44, pp 1-4, Oct 1973**T S Rathore**and K S Mehta, A digital coding matrix, Chilton’s Instrumentation and Control (USA), no 3, p 30, March 1970

**T. S. Rathore,**and J. L. Rathore, अंकीय मापन तकनीकें, Rajsthan Hindi Granth Academy, Jaipur, 2020.**T. S. Rathore**and M. E. Van Valkenburg, 'Network Analysis', Pearson India Education Services Pvt. Ltd, New Delhi, Revised 3rd Edition, 2019.- Divyang Vyas and
**T. S. Rathore**, Time-Multiplexed Switched-Capacitor Circuits, Lap Lambert Academic Publishing Gmbh & Co KG, Germany, 2012 **T. S. Rathore,**'Digital Measurement Techniques', Narosa Publishers, New Delhi, First Edition 1996, Revised Edition: 2003, for sale in India by Narosa Publishers and for sale in UK by Europe by Alpha Science International Ltd, Pangbourne England. The book has been translated in**Russian**in 2004 and in**Hindi**in 2020.

**Gautam Shah**(2012): Algorithms and Architectures for Discrete Hartley Transform**Uday Pandit Khot**(2010): Synthesis of Analog Circuits employing Current-Mode Building Blocks**B M Singhi**(1980): Some Contributions on Synthesis of Passive and Active Circuits

**Editorial Board Member**of Int. J. of Advances in Applied Sciences (ISSN 20252-8814) from December 2020 to November 2023**Member**, Editorial Board of IETE J of Education (2012-2017)**Member**, Editorial Board ISTE Indian J of Technical Education**Editor-in-Chief**of 8 issues of Sanshodhan, the Technical Magazine of SFIT (2008-2014)**Regional Editor**, International Journal of Knowledge-Based Engineering Systems (Australia)**Guest Editor**, Special issue of the Journal of Institution of Engineers (India) (Electronics & Telecommunication Division), Instrumentation Electronics (vol 72, Feb 1992)

**Conference Chair**,(April 4-5, 2014) IEEE approved International Conference on Circuits, Systems, Communication and Information Technology Applications, CSCITA**Coordinator**(June 25–July 4, 2012) Workshop on Research Methodology**Coordinator**(Feb 24-25, 2012) Electronic Systems, Thakur College of Engg and Technology**Coordinator**Workshop on Use of articles, SFIT- Lecture Art and Science of Setting and Evaluation of question papers, FIP, SFIT
- Work shop (June 26, 2007) WINFIG software, SFIT,
**Convener**(Feb 23-24, 2011) IEEE (Bombay Section) approved national seminar on ‘Circuits, Systems and Signal Processing’,**Convener**(2010), Seminar on ‘Mathematical and Computational Techniques in Engineering**Convener**First SFIT National Seminar INFOCOM, 2007**General Chairman**(Oct 12-13, 2007), IETE Int Conf on Nanotechnology and Health Care Applications (NateHCA)**General Chairman**(Dec 2001) of the IETE Int Conf on Quality, Reliability and Control (ICQRC)**Conference Chair**(Aug 30-Sept 1, 1999) (from India), 3rd Int Conf on Knowledge-Based Intelligent Information Engg Systems, Adelaide, Australia,

- How to set question papers, FIP-12, July 7, 2012
- Mathematical & Computational Techniques in Engineering, March 26-30, 2012
- Question Paper Setting and Evaluation, FIP-10, July 16, 2010
- The Art of Setting Question Papers & Evaluation, August 26, 2008
- Resource Material for Teaching Analog Electronics, CDP Workshop, IIT Bombay, 1996
- Analog Electronics, Workshop on March 17, 1994
- Electronic Measurement and Instrumentation Techniques (EMIT), ISTE course, IIT Bombay, 1991
- Digital Measurement Techniques, ISTE course, IIT Bombay, 1982
- Recent Topics in Circuit Theory, QIP course, IIT Bombay, 1980

**Sir M. Visvesvaraya Award**by Department of Science and Technology, Anuragyam, New Delhi, on Engineers' Day September 15, 2021**Life-time achievement award**by VDGOOD Professional Association, International Scientist Awards on Engineering, Science and Medicine, 10 & 11-Sep-2021, Coimbatore, India.**आदर्श शिक्षक पुरस्कार**(2020) from Mahaveer International, Mumbai on Teachers’ Day, Sept 5, 2020.**Best author of the year award-**(2019)**Research Excellence Awards**(2017), MT Research and Educational Services, by Mukesh Pathak, Entrepreneur, CEO & Founder of Indian Achievers Story & Social Hindustan**IETE B R Batra Memorial Award**(2005) in recognition of selfless service to the cause of the IETE for overall growth, honor and furtherance of its basic aims and objectives. The award consists of a gold medal and a citation**IETE Prof K Sreenivasan Memorial Award**(2005) in recognition of distinguished contribution in teaching Electronics & Communication Engineering. The award consists of a medal, a citation and cash. For the first time in the history of IETE, the same person has received two awards in the same year and two consecutive years. Both the above awards were conferred during the inaugural function of the 48th Annual Technical Convention of IETE on Sept 23, 2005, at Hotel Taj Palace, New Delhi.**IETE S V C Aiya Award**, 2004, The award is given annually to a person for providing guidance in electronics and telecommunication research work.**ISTE Maharashtra State National Award**2003 for Outstanding Research Work. The award consists of a cash prize, a medallion and a citation. 33rd Annual Convention of ISTE on Dec 27, 2003 at Kumarguru College of Technology, Coimbatore.**ISTE U P Government National Award**(2002) for writing of the book 'Digital Measurement Techniques. The award consists of a cash prize, a medallion and a citation. The award was presented by Dr R Natarajan, Chairman AICTE, on Dec 27, 2002 at the Inaugural Function of 32nd ISTE Annual Convention, Nitte.**IEEE Silver Jubilee Medal**(2001) for the outstanding work done for the sister organization IETE, India.**IETE M N Saha Memorial Award**(1995) for the best application oriented paper 'Programmable Gain Amplifiers' J IETE (I), vol 41, pp 277-284, 1995 presented by Prof Yash Pal- Listed in:
**Asia’s Who’s Who of Men & Women of Achievement**, vol. 6, 1991. **Merit-cum Means Scholarship**: (1961-1965).

Following best paper awards

**T S Rathore**, “A Systematic Method for Finding the Input Impedance of Two-Terminal Networks”, IETE Journal of Education, Jul-Dec 2017**T S Rathore**, “Circuit theorems (Part I) – Scope and limitations” (Review paper), Int. J. of Technology, A K G Engineering College, Ghaziabad, India, 2017**T S Rathore**, “NDD functions: Properties and applications”, IETE, 2012**T S Rathore**, “Applications of timer integrated circuits”, IETE, 2010**T S Rathore**, & G A Shah, Design, development & applications of pc-based process control trainer for automation, IETE Tech Review, 2008

**Chairman**of ISTE IIT-B Chapter (2001-2006)**Convener of Telephone Advisory Committee**IIT Bombay, (1990-2005)**Regional Editor**of the International Journal of Knowledge-Based Intelligent Engineering Systems**Member**on the editorial board of the IETE J of Education (2012-2017)**Member**on the editorial board of the ISTE National J of Technical Education**Chairman**(2006-2008),(2001-2002),**Vice-Chairman**(2004-2006),**Member**(2003-2004),**Secretary**(1999-2001),**Co-opted Member**(1998-1999),**Volunteer**(1997-98) of IETE Mumbai Centre**Member**Board of Studies of EE and Electronics & Instrumentation of SGSITS, Indore (2006-2008)**Member**Board of Studies of Electrical Engineering, M A National Institute of Technology, Bhopal (2006-2008)**Coordinator**for solution manuals of DIPIETE question papers

**Miscellaneous**

- Was expert member on selection committees
- delivered several invited/special/keynote lectures
- Set question papers for UPSC, GATE, L&T, NTPC, and several Universities
- chaired technical sessions

**Hindi poem writing**:

His some of the poems have been broadcasted from Akashwani Adelaide (June 1993), and some have been published in IIT Hindi Magazine 'Kshitiz' and elsewhere. He has participated in some Kavi Sammelans organized by IIT Bombay.

His Hindi writing collections:**श्रद्धा सुमन**(2009),**प्रतिबिंब**(2010),**झरोखा**(2011),**झरना**(2017),**स्मारिका**(२०१८),**मेरे अपने**(2020),**गुलदस्ता**(2022),**इन्द्रधनुष**(2023)- He was
**Social Secretary of IIT Bombay Staff Club**(1995-1996, 1997-1998) and organized several social functions (Independence Day, Navratri (Dandia), Diwali, New Year, Holi) and picnics (Karol Bag, Khandala). Among many items introduced,**अंताक्षरी**(1995) and A musical drama**A Love Story**(1997) were very popular. - Likes Playing Cards, Carrum, Chess, Badminton, Table Tennis, Listen Old Hindi Filmy Songs
- Visited: Montreal, London, Venice, Malaysia, Palmerston North (New Zealand), Toronto, Louisville, and all major cities of India.
- Member of SEW (Scientists and Engineering Wing) of Brahma Kumaris.

Email: tsrathor@ee.iitb.ac.in

Mobile: +91 9833767678

tsr@1234

faculty/tsrathor.txt · Last modified: 2024/07/01 11:38 by tsrathor