{"id":597,"date":"2025-06-12T10:40:32","date_gmt":"2025-06-12T10:40:32","guid":{"rendered":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/?page_id=597"},"modified":"2025-06-26T18:05:02","modified_gmt":"2025-06-26T18:05:02","slug":"xen-10","status":"publish","type":"page","link":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/xen-10\/","title":{"rendered":"XEN 10"},"content":{"rendered":"\n<figure class=\"wp-block-image size-full is-style-default\"><img loading=\"lazy\" width=\"525\" height=\"592\" src=\"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-content\/uploads\/2025\/06\/Screenshot-2025-06-04-142219.png\" alt=\"\" class=\"wp-image-562\" srcset=\"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-content\/uploads\/2025\/06\/Screenshot-2025-06-04-142219.png 525w, https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-content\/uploads\/2025\/06\/Screenshot-2025-06-04-142219-266x300.png 266w\" sizes=\"(max-width: 525px) 100vw, 525px\" \/><\/figure>\n\n\n\n<p class=\"has-text-align-left\"><strong>ALTERA MAX10 FPGA development board for advanced digital design experiments and R&amp;D projects<\/strong><\/p>\n\n\n\n<p class=\"has-text-align-left\"><strong>Features of Xen-10<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>FPGA device: Altera MAX 10 (10M25SAE144C8G \/10M08SAE144C8G)<\/li>\n\n\n\n<li>USB connector for programming &amp; JTAG interface for debugging<\/li>\n\n\n\n<li>8on-board switches and 8 on-board LEDs<\/li>\n\n\n\n<li>4push-buttons<\/li>\n\n\n\n<li>HEADER to connect external devices and boards<\/li>\n\n\n\n<li>16-pin connector for LCD panel and OLED or any I2C interface devices<\/li>\n\n\n\n<li>On-board 12-bit single channel MCP4921 DAC<\/li>\n\n\n\n<li>On-board clock of 1 Hz, 10 MHz, 50 MHz and provision for external clock source connection through EXT CLK header<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>ALTERA MAX10 FPGA development board for advanced digital design experiments and R&amp;D projects Features of Xen-10<\/p>\n","protected":false},"author":3,"featured_media":562,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":[],"_links":{"self":[{"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/pages\/597"}],"collection":[{"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/comments?post=597"}],"version-history":[{"count":5,"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/pages\/597\/revisions"}],"predecessor-version":[{"id":656,"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/pages\/597\/revisions\/656"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/media\/562"}],"wp:attachment":[{"href":"https:\/\/www.ee.iitb.ac.in\/~wel_iitb\/wp-json\/wp\/v2\/media?parent=597"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}