EE-748:
Advanced Topics in Computer Architecture
Semester: July - Nov 2013
Instructor: Virendra
Singh
Class Timings: Slot 3 [10:30 am -
11:30 am (Mon), 11:30 am - 12:30 pm (Tue), and 8:30 am - 9:30 am (Thu)]
Office Hours:
Syllabus:
Overview
Superscalar and VLIW architectures. Limits of instruction level parallelism (ILP). Simultaneous
multi-threaded (SMT) architecture, Performance enhancement through branch
prediction and value prediction, BulkSMT, Thread
level speculation. Run ahead execution, proactive
instruction fetch, multi-core architectures, data marshaling for multi-core
architectures, power constrained CMPs, heterogeneous core design, Core Fusion,
Transactional memories. Performance evaluation of complex
microarchitectures. On-chip interconnects (Network-on-Chip). Architectural vulnerabilities and reliable architectures.
Patchable design. Secure architectures. Energy efficient
architectures. Power management. Cache design, energy
efficient cache partitioning, fast thread migration, thread throatling.
References (Mostly from current literature):
Must to read
papers (before coming to
the first class)
List of representative papers (To be discussed in the class)
21. A. Tumeo, S. Secchi,
and O. Villa, `Designing
next-generation massively multithreaded architectures for irregular application`,
IEEE Computers, vol. 45, no. 8, Aug 2012
Prerequisite: CS-683: Advanced computer
architecture/EE-739: Processor Design. Instructor`s consent is mandatory.
Evaluation:
Class Schedule: (Moodle course
resources: slides and discussion)
1.
July 18: Course Introduction
2.
July 22: High performance computer
architecture review-1: Superscalar architecture
3.
July 23: High performance computer
architecture review-2: Multi-threading
4.
Aug 01: High performance computer architecture
review-3: SMT architecture
5.
Aug 05: High performance computer architecture
review-4: OS impact and advanced memory optimization
6.
Aug 06: High performance computer architecture
review-5: Multicore architecture, memory coherence and interconnects
7.
Aug 08: Amdahl`s law in multicore era (Paper: Amdahl`s
law in the multi-core era, IEEE Computers 2008)
8.
Aug 12, 13: Amdahl`s Law in
multicore era (Paper: Extending
Amdahl`s Law for Energy Efficient Computing in the Many Core Era, IEEE
Computers 2008)
9.
Aug 19, 20: Amdahl`s law in
multicore era (Paper: Re-evaluating
Amdahl`s Law in the Multicore Era, J.PDC 2010, and other related papers)
10. Aug 22, 26, 27: The future of microprocessors (Paper: The future of microprocessors,
Communications of ACM 2011)
11.
Aug 29, Sep 02: Energy Efficient
Fault Tolerance (Paper: Energy-Efficient
Fault Tolerance in Chip Multiprocessors using Critical Value Forwarding,
DSN 2010)
12.
Sep 03, 05: Throughput Efficient Fault Tolerance (Paper: Multiplexed
Redundant Execution (MRE): A Technique for Efficient Fault Tolerance in Chip
Multiprocessors, DATE 2010)
13.
Sep 16, 17, 19: Adoption for Aggression (paper: Illusionist:
Transforming Lightweight Cores into Aggressive Cores on Demand, HPCA 2013)
14.
Sep 23, 24, 26: Core combining (paper: Core Fusion:
Accommodating Software Diversity in Chip Multiprocessors, ISCA 2007)
15.
Sep 30, Oct 1, 3: Bringing
Heterogeneity in a core (paper: Composite
Cores: Pushing Heterogeneity into a Core, Micro 2012)
16.
Oct 7, 8, 10: Core morphing
(paper: Morph
Core: An Energy-Efficient Microarchitecture for High Performance ILP and High
Throughput TLP, Micro 2012)
17.
Oct 14, 15: Dynamic cores
18.
Oct 17, 21, 22: Power Struggle
(Paper: Power
struggles: Revisiting the RISC vs CISC debate on contemporary
ARM and x86 architectures, HPCA 2013)
19.
Oct 23, 25: Scheduling (Paper: Scheduling
Heterogeneous Multi-Cores through Performance Impact Estimation (PIE), ISCA
2012)
20.
Oct 28: Midsem
Examination
21.
Oct 29, 31: Cooperative Boosting
(Paper: Cooperative
boosting: Needy versus greedy power management, ISCA 2013)