I work in CADSL
lab under the guidance of Prof. Virendra Singh
Electrical Enginnering Department
Indian Institute of Technology Bombay
Research Interests: Computer Architecture, Embedded Systems
- [GLSVLSI 2018][Paper][Presentation]
Suhit Pai, Newton, and Virendra Singh
AB-Aware: Application Behavior Aware Management of Shared Last Level Caches In Proceedings of the 28th edition of the ACM Great Lakes Symposium on VLSI (GLSVLSI), Chicago, USA, May 2018.
- [ICCD 2017][Paper][Presentation]
Newton, Sujit Kumar Mahto, Suhit Pai and Virendra Singh
DAAIP: Deadblock Aware Adaptive Insertion Policy for High Performance Caching In Proceedings of the 35th IEEE International Conference on Computer Design, Boston, USA, November 2017.
- [VDAT 2017][Paper]
Sujit Kumar Mahto and Newton
ACAM: Application Aware Adaptive Cache Management for
Shared LLC In Proceedings of the 21st International Symposium on VLSI Design and Test, Roorkee, India, July 2017.
- [GLSVLSI 2017][Paper][Presentation]
Abhishek Rajgadia, Newton and Virendra Singh
EEAL: Processors' Performance Enhancement Through Early Execution of Aliased Loads In Proceedings of the 27th edition of the ACM Great Lakes Symposium on VLSI (GLSVLSI), Banff, Canada, May 2017.