VLSI SystemsSelected List of PublicationsProbabilistic algorithms and graph theoryDevices and CircuitsContents

Devices and Circuits

  1. N. Mohapatra, M. Desai, S. Narendra, V. R. Rao, "Impact of High-K Gate Dielectrics on Sub 100 nm CMOS Circuit Performance", Proceedings of the 31st European Solid-State Device Research Conference, 2001.
  2. A. P. Nair, A. Gupta, M. Desai, "An On-Chip Coupling Capacitance Measurement Technique", Proceedings of The 14th International Conference on VLSI Design, 2001.
  3. M.S. Baghini, M.P. Desai "Impact of technology scaling on metastability performance of CMOS synchronizing latches", Proceedings of the 15th International Conference on VLSI Design 2002.
  4. P. Sivaram, B. Anand, M. Desai, "Silicon film thickness considerations in SOI-DTMOS", IEEE Electron Device Letters, 2002.
  5. Mohapatra, N.R., Desai, M.P., Narendra, S.G., Rao, V.R. "The effect of high-K gate dielectrics on deep submicrometer CMOSdevice and circuit performance", IEEE Transactions on Electron Devices, 2002.
  6. N. Mohapatra, M. Desai, S. Narendra, V.R. Rao, "Modeling of parasitic capacitances in deep submicrometer conventional and high-K dielectric MOS transistors", IEEE Transactions on Electron Devices, April 2003.
  7. Prasad, V. Desai, M.P. "Interconnect delay minimization using a novel pre-mid-post buffer strategy", Proceedings of the 16th International Conference on VLSI Design, 2003.
  8. G.T. Hazari, M.P. Desai, A. Gupta, and S. Chakraborty, "A novel technique towards eliminating the global clock in VLSI circuits," Proceedings of the 17th International Conference on VLSI Design, 2004.
  9. B. Anand, M.P. Desai, V.R. Rao " Silicon film thickness optimization for SOI-DTMOS from circuit performance considerations, " IEEE Electron Device Letters, 2004.
  10. Narasimhulu, K. Desai, M.P. Narendra, S.G. Rao, V.R. "The effect of LAC doping on deep submicrometer transistor capacitances and its influence on device RF performance", IEEE Transactions on Electron Devices, 2004.
  11. V. Prasad, M. Desai, "On buffering schemes for long multi-layer nets", Proceedings of the 17th IEEE International Conference on VLSI Design, 2005.

Madhav Desai, December 30, 2010

VLSI SystemsSelected List of PublicationsProbabilistic algorithms and graph theoryDevices and CircuitsContents