VLSI Systems
- M. Desai, R. Gupta, A. Karandikar, K. Saxena, V. Samant,
"Reconfigurable finite-state machine based IP lookup engine for high-speed router",
IEEE Journal on Selected Areas in Communications, May 2003.
- A. Mittal, M. Desai,
"A distributed and pipelined controller for a modular and scalable hardware emulator",
Proceedings of the 17th International Conference on VLSI Design, 2004.
- G. Hazari, H. Kasture, M.P. Desai,
" On the Impact of Address Space Assignment on Performance in Systems-on-Chip",
Proceedings of the 20th International Conference on VLSI Design, 2007.
- P. Kumar, M.P. Desai,
" Learning based address mapping for improving the performance of memory subsystems",
Proceedings of MASCOTS 2009, 2009.
- G. Hazari, S. Gangam, M.P. Desai,
" Bottleneck Identification Techniques Leading to Simplified Performance Models for Efficient Design Space Exploration in VLSI Memory Systems",
Proceedings of the 23rd International Conference on VLSI Design, 2010.
Madhav Desai, December 30, 2010
