1. Chip Design and Design Tool Development (Department of Electronics)

2. Design of LSTTL Circuits (Bharat Electronics Ltd.)

3. Design of 94 GHz SPST PIN diode switch (Defence Research and Development Organization

4. Circuit Partitioner for VLSI Design (NTT, Japan)

5. Circuit Partitioner for VLSI Design (Virtual Machines Inc., USA)

6. Intel Microelectronics Design and Simulation Laboratory (Intel Asia)

7. Modern Electronic Design Techniques (All-India Council of Technical Education)

8. Project IMPACT for VLSI Design Education (Department of Electronics)

9. System Partitioner for Eigenvalue Problems for Large-Scale Physical Systems (Naval Research Board)

10. Issues in IC Design (Semiconductor Complex Ltd.)

11. Design of a test chip for coupling capacitance measurement
Sponsor: National Semiconductor Corp.

12. Design of a low offset high speed comparator
Sponsor: Texas Instruments

13. State Machine Implementation using Decomposition
Sponsor: Department of Science and Technology

14. Inductance Calculation in VLSI circuits
Sponsor: Silicon Automation Systems

15. Interconnect capacitance extraction by Monte Carlo (Intel) .Eigenvalues for large scale systems (NRB) .Math programming & electrical networks (DST) .General purpose systems partitioners (NRB) .Design issues with high-k dielectrics (Intel)

16. Analog PHY interface chip (ControlNet) .Data Conversion & RF Circuits (Texas Instruments India) .High-speed comparator design (TII) .Communication VLSI Design (SASKEN) .Packet classifier (Switch-on Networks) .FSM-based packet router (DST) .On-chip coupling capacitance measurement (MHRD) .VLSI Design training (MIT, TCS)