Rahul Singh (Assistant Professor)

High-Frequency Circuits Lab
Department of Electrical Engineering
Indian Institute of Technology Bombay
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Journals

  1. R. Singh, S. Mondal and J. Paramesh, A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads, IEEE Trans. on Microwave Theory and Techniques, vol. 68, no. 9, pp. 3794-3803, Sept. 2020. (link)
  2. R. Singh, S. Mondal and J. Paramesh, A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers, IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 2555-2568, Jul. 2019. (link)
  3. S. Mondal, R. Singh, A. I. Hussein, and J. Paramesh, A 25-30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication, IEEE Journal of Solid-State Circuits, vol. 53, pp. 1275-1287, May 2018. (link)
  4. R. Singh, G. Slovin, M. Xu, T. E. Schlesinger, J. A. Bain and J. Paramesh, A Reconfigurable Dual-Frequency Narrowband CMOS LNA using Phase-Change RF Switches, IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 11, pp. 4689-4702, Nov. 2017. (link)
  5. G. Slovin, M. Xu, R. Singh, J. Paramesh, T. E. Schlesinger, and J. A. Bain, Design Criteria in Sizing Phase-Change RF Switches, IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 11, pp. 4531-4540, Nov. 2017. (link)
  6. R. Singh, G.-M. Hong, and S. Kim, Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files, IEEE Transactions on Circuits and Systems-I, vol. 60, no. 4, pp. 965-974, April 2013. (link)
  7. R. Singh, J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, Power-Gating Noise Minimization by Three-Step Wake-up Partitioning, IEEE Transactions on Circuits and Systems-I, vol. 59, no. 4, pp. 749-762, April 2012. (link)
  8. R. Singh, G. M. Hong, M. O. Kim, J. Park, W. Y. Shin, and S. Kim Static-Switching Pulse Domino: A Switching-Aware Design Technique for Wide Fan-in Dynamic Multiplexers, Elsevier Integration, the VLSI Journal, vol. 45, no. 3, pp. 253-262, June 2012. (link)
  9. R. S. Dudhe, S.P. Tiwari, H. N. Raval, M. A. Khaderbad, R. Singh, J. Sinha, M. Yedukondalu, M. Ravikanth, A. Kumar, and V. R. Rao, Explosive vapor sensor using poly-(3-hexlythiopene) and Cu-tetraphenyl-porphyrin composite based Organic field effect transistors, Applied Physics Letters (APL), 93, 2633606 (2008). (link)
  10. S. K. Vishvakarma, B. Raj, A. K. Saxena, R. Singh, C. R. Panda, and S. Dasgupta, Evaluation of Threshold Voltage for 30-nm Symmetric Double Gate (SDG) MOSFET and its variation with process parameters, Journal of Computational and Theoretical Nanosciences (JCTN), vol. 5, no. 4, pp. 619-626, 2008. (link)

Conferences

  1. S. Mondal, R. Singh, and J. Paramesh, A Reconfigurable Bidirectional 28/37/39 GHz Front-End Supporting MIMO-TDD, Carrier Aggregation TDD and FDD/Full-Duplex with Self-Interference Cancellation in Digital and Fully-Connected Hybrid Beamformers, Proceedings of the International Solid-State Circuits Conference (ISSCC), pp. 348-350, Feb. 2019.(link)
  2. R. Singh, S. Mondal and J. Paramesh, A 25.1-27.6 GHz Tunable-Narrowband Digitally-Calibrated Merged LNA-Vector Modulator for 5G Phased Arrays, Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC), pp. 4-7, Jun. 2018. (link)
  3. S. Mondal, R. Singh, and J. Paramesh, A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation, Proceedings of the International Solid-State Circuits Conference (ISSCC), pp. 72-74, Feb. 2018. (link)
  4. S. Mondal, R. Singh, A. Hussein and J. Paramesh, A 25-30 GHz 8-Antenna 2-Stream Hybrid Beamforming Receiver for MIMO Communication, Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC), pp. 112-115, Jun. 2017.(link)
  5. R. Singh and J. Paramesh, A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers, Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC), pp. 332-335, June 2017. (link)
  6. R. Singh, G. Slovin, M. Xu, A. Khairi, S. Kundu, T. E. Schlesinger, J. A. Bain and J. Paramesh, A 3/5 GHz Reconfigurable CMOS Low-Noise Amplifier Integrated with a Four-Terminal Phase-Change RF Switch, Proceedings of the IEEE Int. Electron Devices Meeting (IEDM), pp. 25.3.1-25.3.4, Dec. 2015. (link)
  7. R. Singh, J.-C. Son, U. Cho. G. Jung, M.-S. Kim, H. Lee, and S. Kim A Static-Switching Pulse Domino Technique for Statistical Power Reduction of Wide Fan-in Dynamic Gates, Proceedings of the ACM/IEEE Great Lakes Symposium on VLSI (GLSVLSI), pp. 127-132, May 2011. (link)
  8. R. Singh, A.-R. Kim, and S. Kim, Footer Voltage Feedforward Domino Technique for Wide Fan-in Dynamic Logic, Proceedings of the IEEE International SOC Conference (SOCC), pp. 224-229, September 2010. (link)
  9. R. Singh, A.-R. Kim, S.-Y. Kim, and S. Kim, A Three-step Power-Gating Turn-on Technique for Controlling Ground Bounce Noise, Proceedings of the ACM/IEEE International Symposium on Low Power Electronics Design (ISLPED), pp. 171-176, August 2010.(link)
  10. R. Singh, Clock-free Transmission Gate Master-Slave Latch with a Centralized Sleep Switch Structure, Proceedings of IEEE VLSI Design and Test (VDAT), 2009.
  11. S. K. Vishvakarma, B. Raj, R. Singh, C. R. Panda, A. K. Saxena, and S. Dasgupta, Analytical Modeling of Threshold Voltage for Nanoscale Symmetric Double Gate (SDG) MOSFET with Ultra-Thin Body (UTB), Proceedings of the International Workshop on Physics of Semiconductor Devices, pp. 277-280, Dec. 2007. (link)

Patents (US)

  1. R. Singh, J. Goldblatt, A. Helmy, Reconfigurable Multi-Feedback Filter for MMW Receivers, US Patent Application 18/747,384 (Filed June 18, 2024).
  2. R. Singh, M. Bakhshiani, Symmetrical Resistive Harmonic Reject Mixer, US Patent Application 17/934,467 (Filed Sep 21, 2022).
  3. R. Singh, M. Bakhshiani, T. Gathman, Y. Guo, and E. Dagher, Linear and Bandwidth Reconfigurable Current Buffer or Amplifier, US Patent Application 17/886,887 (Filed Aug 11, 2022).
  4. R. Singh, M. Bakhshiani, Current-Mode Radio Frequency Attenuators, US Patent Application 17/652,961 (Filed Feb 28, 2022).
  5. R. Singh, B. Yang, Multi-band Input Stage of Receiver with Selectable Third-Harmonic Filter, US Patent Application 17/669,178 (Filed Feb 9, 2022).
  6. R. Singh, M.-S. Kim, C.-H. Kim, Semiconductor Circuit and Semiconductor System, US Patent 9,503,062 (November 22, 2016).
  7. R. Singh, M.-S. Kim, Semiconductor Circuit and Method of Operating the Same, US Patent 9,160,317 (October 13, 2015).
  8. R. Singh, M.-S. Kim, Clock Gating Circuit, US Patent 9,059,693 (June 16, 2015).
  9. R. Singh, H.-W. Lee, Clock-Delayed Domino Logic Circuit, US Patent 8,907,700 (December 9, 2014).
  10. 9. H.-W. Lee, G.-O. Jung, S. Kim, A.-R. Kim, R. Singh, Domino Logic Circuits and Pipelined Domino Logic Circuits, US Patent 8,542,033 (September 24, 2013).