Prof. Rajesh Zele

Department of Electrical Engineering

IIT Bombay

EE719 – 2023 Library

EE719 – 2023 Mixed Signal VLSI Design

Lecture 1

Lecture 1

Introduction

Lecture 4

Lecture 4

ADC Concept

Lecture 7

Lecture 7

ADC Sample & Hold – II

Lecture 10

Lecture 10

ADC Sample & Hold – V

Lecture 13

Lecture 13

Comparator – III

Lecture 16

Lecture 16

SAR ADC

Lecture 19

Lecture 19

Folding & Interpolating ADC

Lecture 22

Lecture 22

DAC Design – I

Lecture 25

Lecture 25

DAC Design – IV

Lecture 2

Lecture 2

All about Transforms – I

Lecture 5

Lecture 5

Converter Non-idealities

Lecture 8

Lecture 8

ADC Sample & Hold – III

Lecture 11

Lecture 11

Comparator – I

Lecture 14

Lecture 14

Flash ADC – I

Lecture 17

Lecture 17

Pipeline ADC – I

Lecture 20

Lecture 20

Time Interleaving ADC

Lecture 23

Lecture 23

DAC Design – II

Lecture 3

Lecture 3

All about Transforms – II

Lecture 6

Lecture 6

ADC Sample & Hold – I

Lecture 9

Lecture 9

ADC Sample & Hold – IV

Lecture 12

Lecture 12

Comparator – II

Lecture 15

Lecture 15

Flash ADC – Literature review

Lecture 18

Lecture 18

Pipeline ADC – II

Lecture 21

Lecture 21

Oversampling ADC

Lecture 24

Lecture 24

DAC Design – III