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Students' Reading Group
Department of Electrical Engineering, IIT Bombay

PHASE IV


Presenter Name Makarand Kane,
Research Scholar, Insulation Diagnostics Lab
Cluster EE4/EE5
Email-id:
Topic: Exploring Better Ways to Manufacture Silicon Wafers for Photovoltaics
Venue: GG 303
Session Chair:
Date: 10/03/2017 at 4 PM
Pre-Requisite: None
Abstract: Wire electric discharge machining (WEDM) is being explored as a better alternative for cutting silicon wafers out of silicon ingots. Previous research at IIT Bombay has shown that kerf losses can be reduced from 40% to 20% by this process. Several areas need to be explored in this domain, like study of discharge between wire and semiconductor contacts, special pulsed power source for WEDM, control of WEDM for silicon, study of plasma between wire and silicon and experimental study to investigate best suited material for WEDM of silicon. This talk will discuss some of the preliminary experimental and numerical results.
Presentation Slides:
Presenter Name Sivaramakrishna,
Ph.D., HSICCS Group
Cluster EE4/EE5
Email-id:
Topic: The Buzz around mm-Wave CMOS IC Design, In a nutshell
Venue: GG 303
Session Chair:
Date: 01/03/2017 at 4.15 PM
Pre-Requisite: None
Abstract: Developments in CMOS IC technology have pushed the (maximum) operating frequency of (CMOS) ICs to the mm-wave range, leading to the buzz around "millimeter-Wave CMOS IC Design". This talk presents the widespread applications where mm-Wave CMOS IC design has a huge scope and CMOS IC technology challenges involved specifically at mm-Wave frequency. Following this, a typical system level transceiver design, constraints and few considerations to address them will be discussed. Towards the end, the speaker will present mm-Wave VCOs (voltage control oscillators) and frequency dividers at the circuit level, the essential blocks of frequency synthesizers (PLLs), designed by their group.
Presentation Slides:

Presenter Name Makarand Kane,
Research Scholar, Insulation Diagnostics Lab
Cluster EE4/EE5
Email-id:
Topic: Exploring Better Ways to Manufacture Silicon Wafers for Photovoltaics
Venue: GG 303
Session Chair:
Date: 10/03/2017 at 4 PM
Pre-Requisite: None
Abstract: Wire electric discharge machining (WEDM) is being explored as a better alternative for cutting silicon wafers out of silicon ingots. Previous research at IIT Bombay has shown that kerf losses can be reduced from 40% to 20% by this process. Several areas need to be explored in this domain, like study of discharge between wire and semiconductor contacts, special pulsed power source for WEDM, control of WEDM for silicon, study of plasma between wire and silicon and experimental study to investigate best suited material for WEDM of silicon. This talk will discuss some of the preliminary experimental and numerical results.
Presentation Slides: