IEEE International Workshop on Reliability Aware System Design and Test

(In conjunction with the International Conference on VLSI Design)

Bangalore, India January 7-8, 2010

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Call for Papers (pdf)

Paper Submission

Key Dates

Organizing Committee

Steering Committee

Program Committee

Program

Invited Talks

Panel

Visa

Venue

Registration

Even as advances in CMOS technology come up against physical limits of material properties and lithography, raising many new challenges that must be overcome to ensure IC quality and reliability, there appears to be no obvious alternate technology that can replace End-of-Roadmap CMOS over the next decade. However, many reliability challenges from increasing defect rates, manufacturing variations, soft errors, wearout, etc. will need to be addressed by innovative new design and test methodologies if device scaling is to continue on track as per Moore`s Law to 10nm and beyond. The key objective of this annual workshop, planned to be held in conjunction with the International Conference on VLSI Design, is to provide an informal forum for vigorous creative discussion and debate of this area. The aim is to encourage the presentation and discussion of truly innovative and `out-of-the-box` ideas that may not yet have been fully developed for presentation at reviewed conferences to address these challenges. Additionally, the workshop invites embedded talks and tutorials on cutting edge topics related to reliability aware design of CMOS and hybrid nanotechnology systems.

Representative topics include, but are not limited to:

-Design for test, - Built-in self-test - ATPG and defect oriented test - Delay test - Low power test - Instruction-based self-test - On-line test methodology - Reliability of CMOS circuits - Self checker circuits - Self diagnosis methods

- Fault tolerant micro-architecture - Self-healing system design - Energy and performance aware fault tolerant micro-architectures - Device degradation and mitigation - System validation methodology - Secure system design - Design for reliability, dependability, and verifiability

Submissions

Authors are invited to submit previously unpublished technical proposals. The proposals must be full papers not to exceed 6 pages. Each submission should include: title, full name and affiliation of all authors, a short abstract of 50 words, and 4 to 6 keywords.  Also, identify a contact author and include a complete correspondence address, phone number, fax number, and e-mail address. Submit a copy of your proposal in PDF either online submission through EasyChair or via e-mail to : rasdat2010@easychair.org, rasdat2010@serc.iisc.ernet.in

Key Dates:

Paper Submission: November 17, 2009 (Extended)

Acceptance Notification: November 30, 2009

Final Paper Due: December 15, 2009

Presentation Due: Jan 1, 2010

Invited Speakers

Dr. Yervant Zorian (Virage Logic)

Dr. Greg Taylor (Intel)

Prof. Bernd Becker (Freiburg Univ.)

Prof. Mark Zwolinski (Southampton Univ.)

Dr. Shubu Mukherjee (Intel)

General Information

Adit Singh Auburn University, Auburn, USA E-mail: adsingh@auburn.edu Tel: +1.334.644.1647 Fax: +1.334.844.1809

Virendra Singh Indian Institute of Science, Bangalore, India E-mail: viren@serc.iisc.ernet.in Virendra@computer.org Tel: +91.80.2293.3421 Fax: +91.80.2360.2648 Mob: +91.810.5678.361

Organizing Committee

General Co-Chairs

Adit Singh (Auburn U., US)

Virendra Singh (IISc, IN)

General Vice Co-Chairs

Michiko Inoue (NAIST, JP)

Sreejit Chakravarty (LSI, US)

Program Co-Chairs

Erik Larsson (Linkoping U. SE)

Rubin Parekhji (TI, IN)

Program Vice Co-Chairs

Ilia Polian (Freiburg U., DE)

MS Gaur (MNIT, IN)

Organizing Committee Co-Chairs

Bhargab Bhattacharya (ISI, IN)

SK Nandy (IISc, IN)

Publication Chair

V. Kamakoti (IITM, IN)

Finance Chair

Pradip Thaker (ADI, IN)

Publicity Chair:

Susanta Chakravarty (BESU, IN)

Local Arrangement chair

Suraj Sindia (ADI, IN)

Viney Kumar (nVidia, IN)

Website management chair

Sushil Kabra (BSNL, IN)

Registration Chair

Jaynarayan Tudu (IISc, IN)

Steering Committee

K.K. Saluja (US) - Chair

J.A. Abraham (US)

V.D. Agrawal (US)

B. Al-Hashimi (UK)

B. Becker (DE)

A. Chatterjee (US)

H. Fujiwara (JP)

M. Fujita (JP)

E. Larsson (SE)

R. Parekhji (IN)

S.M. Reddy (US)

A.D. Singh (US)

V. Singh (IN)

Program Committee

M. Azimane (NL)

P. Bernardi (IT)

B. Bhattacharya (IN)

K. Chakrabarty (US)

S. Chakravarty (IN)

T. Cheng (US)

E.F. Cota (BR)

D. Das (IN)

G. Di Natale (FR)

P. Girard (FR)

S.K. Goel (US)

P. Harrod (UK)

K. Hatayama (JP)

V. Hahanov (UA)

S. Hellebrand (DE)

U. Ingelsson (SE)

M. Inoue (JP)

T. Inoue (JP)

G. Jervan (ES)

S. Kajihara (JP)

V. Kamakoti (IN)

R. Kapur (US)

H. Ko (CA)

S. Kumar (SE)

S. Kundu (US)

V. Laxmi (IN)

Y. Makris (US)

E. Marinissen (BE)

C. Metra (IT)

S. Mitra (US)

S.K. Nandy (IN)

Z. Navabi (IR)

N. Nicolici (CA)

S. Ohtake (JP)

C.Y. Ooi (MY)

A. Osseiran (AU)

J. Raik (EE)

S. Ravi (IN)

CP Ravikumar (IN)

M. Renovel (FR)

B. Rouzeyre (FR)

M. Sonza Reorda (IT)

N. Tamrapalli (IN)

P. Thaker (IN)

P. Varma (US)

V. Vedula (IN)

B. Vermeulen (NL)

M. Violante (IT)

H. -J. Wunderlich (DE)

Q. Xu (CN)

T. Yoneda (JP)

Z. You (CN)

M. Zwolinski (UK)