9th IEEE International Workshop on
Reliability Aware System Design and Test (In
conjunction with the 31st
International Conference on VLSI Design) Hotel
Hyatt, Pune, India, January 11, 2018 |
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Past Events Call for Papers (pdf) Key Dates Program Invited Talks Panel Visa Venue Hotel Next RASDAT 2019 |
Even as
advances in CMOS technology come up against physical limits of material
properties and lithography, raising many new challenges that must be overcome
to ensure IC quality and reliability, there appears to be no obvious
alternate technology that can replace End-of-Roadmap CMOS over the next
decade. However, many reliability challenges from increasing defect rates,
manufacturing variations, soft errors, wearout,
etc. will need to be addressed by innovative new design and test
methodologies if device scaling is to continue on track as per Moore`s Law to
10nm and beyond. The key objective of this annual workshop, planned to be held
in conjunction with the International Conference on VLSI Design, is to
provide an informal forum for vigorous creative discussion and debate of this
area. The aim is to encourage the presentation and discussion of truly
innovative and `out-of-the-box` ideas that
may not yet have been fully developed for presentation at reviewed
conferences to address these challenges. Additionally, the workshop invites
embedded talks and tutorials on cutting edge topics related to reliability
aware design of CMOS and hybrid nanotechnology systems. Representative topics include,
but are not limited to:
Submissions: Authors are invited to submit previously unpublished technical
proposals. The proposals must be full papers not to exceed 6 pages. Each
submission should include: title, full name and affiliation of all authors, a
short abstract of 50 words, and 4 to 6 keywords. Also, identify a
contact author and include a complete correspondence address, phone number,
fax number, and e-mail address. Submit a copy of your proposal in PDF either online
submission or via e-mail to:
rasdat@ee.iitb.ac.in Key Dates: Paper Submission: Nov 30, 2017 Acceptance Notification: December 15, 2017 Final Paper Due: December
25, 2017 Presentation Due: January
1, 2018 General Information
Program Related Information
|
Organizing Committee General Co-Chairs Adit
Singh ( Virendra Singh ( General Vice Co-Chairs Michiko
Inoue (NAIST, JP) Sreejit Chakravarty ( Program Co-Chairs Erik
Larsson ( Rubin
Parekhji (TI, IN) Program Vice
Co-Chairs Ilia Polian ( MS Gaur (MNIT, IN) Organizing Committee Co-Chairs Bhargab
Bhattacharya (ISI, IN) V. Kamakoti (IITM, IN) Publication Chair Vijay Laxmi
(MNIT, IN) Finance Co-Chairs Pradip Thaker ( S. Ramakrishnan
(WT, IN) Publicity Co-Chairs Susanta Chakravarty (BESU,
IN) Chia Yee Ooi
(UTM, MY) Local Arrangement chair TBD Website management chair Sushil
Kabra (BSNL, IN) Registration Chair Jaynarayan Tudu ( Steering Committee Kewal K. Saluja (US) -
Chair Jacob A. Abraham (US) Vishwani
D. Agrawal (US) Bashir Al-Hashimi (UK) Bernd Becker (DE) Abhijit Chatterjee (US) Hideo Fujiwara (JP) Masahiro Fujita (JP) Erik Larsson (SE) Rubin Parekhji
(IN) Sudhakar M. Reddy (US) Adit D.
Singh (US) Virendra Singh (IN) Program Committee TBD |