Computer Organization & Architecture

Semester: Jan - Apr 2013

Instructor: Virendra Singh

Class Timing: [2:00 pm – 3:00 pm (Monday and Tuesday), 1:00 pm - 2:00 pm (Friday)]

Syllabus:

1. Digital Logic and Digital Systems:

Overview and history of computer architecture, combinational vs sequential logic, hardware description languages (VHDL), physical constraints (gate delay, fan-in, fan-out, energy/power).

2. Instruction Set Architecture:

Introduction to instruction set architecture, Basic organization of computing machine: fetch, decode, and execute; Instruction set types, instruction format, addressing modes, subroutine call and return mechanisms; Structure of machine-level programs; Low-level architectural support for high level languages. Performance assessment.

3. Computer Arithmetic:

Representation of numeric data, signed and unsigned arithmetic; Range, precision and errors in floating-point arithmetic; Design of arithmetic and logic unit (ALU).

4. Processor Architecture:

CISC vs RISC Designs, simple implementation schemes, datapath design, control unit: hardwired realization vs micro-programmed realization, multi-cycle implementation.� Instruction level parallelism, instruction pipelining, pipeline hazards.�

5. Memory Architecture:

Storage systems, introduction to memory hierarchy: importance of temporal and spatial locality; main memory organization, cache memory: address mapping, block size, replacement, and store policies; virtual memory system: page table and TLB.

6. Interfacing and I/O Organization:

External storage; IO fundamentals: handshaking, buffering, programmed IO, interrupt driven IO; Interrupt handling mechanism, Buses: protocols, arbitration, direct memory access (DMA).

Text Book:

DA Patterson and JL Hennessy, Computer Organization and Design, Morgan Kaufmann Publisher, 4e, 2010

Reference Book:

J.P. Hayes, Computer Architecture and Organization, Mc Graw Hill

A.S. Tanenbaum, Structured Computer Organization, PHI Publication

W. Stalling, Computer Organization and Architecture, PHI Publication

Class Schedule:

Lecture 0: Course Introduction

Lecture 1: Introduction to computer architecture

Lecture 2: Historic events in computing

Lecture 3:� Defining computer architecture

Lecture 4:� Performance

Lecture 5:� Instruction Set Architecture -1

Lecture 6: ISA-2

Lecture 7: ISA-3

Lecture 8: ISA-4

Lecture 9:� DLX ISA

Lecture 10: RISC Introduction

Lecture 11: RISC: Single cycle implementation

Lecture 12: RISC: Multi-cycle implementation

Lecture 13: RISC: Multi-cycle implementation

Lecture 14: RISC: Multi-cycle implementation

Lecture 15: Performance enhancement: Pipelining

Lecture 16: Pipelining

Lecture 17: Pipeline hazards

Lecture 18: Pipeline hazards: Data hazard

Lecture 19: Pipeline hazards: Control hazard

Lecture 20: Branch prediction

Lecture 21: Memory system