Project Detail: VLSI IMPACT project (SMDT Project): Sponsored by Ministry of Information technology for Training to Engineering college Teachers in the area of VLSI Design. Total outlay is Rs. 9.5 million and has started now. I am the Co-Coordinator of the Project along with Prof SSSP Rao of CSE Dept
Electrical Engineering
Indian Institute of Technology Bombay
Electrical Engineering
Indian Institute of Technology Bombay
