• Ph.D., Electrical and Computer Engineering, Carnegie Mellon University, USA (2018)
• M.Sc., Electrical Engineering, Seoul National University, South Korea (2011)
• B.Tech., Electronics Engineering, Indian Institute of Technology (BHU), Varanasi (2008)
• Analog/RF/millimeter-wave integrated circuits, systems, and architectures
• IC design for emerging communication technologies
• Digital/mixed-signal calibration techniques for RF transceivers
• Staff RFIC Engineer, RF/Analog Group, Qualcomm, San Diego, USA (2018-2023)
• Engineer, SOC Processor Development, Samsung Electronics, South Korea (2011-2013)
1. R. Singh, S. Mondal and J. Paramesh, “A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads,” IEEE Trans. on Microwave Theory and Techniques, vol. 68, no. 9, pp. 3794-3803, Sept. 2020.
2. R. Singh, S. Mondal and J. Paramesh, “A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers,” IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 2555-2568, Jul. 2019.
3. S. Mondal, R. Singh, A. I. Hussein, and J. Paramesh, “A 25-30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication,” IEEE Journal of Solid-State Circuits, vol. 53, pp. 1275-1287, May 2018.
4. S. Mondal, R. Singh, and J. Paramesh, “A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation,” Proceedings of the International Solid-State Circuits Conference (ISSCC), pp. 72-74, Feb. 2018.
5. R. Singh and J. Paramesh, “A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers,” Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC), pp. 332-335, June 2017.
6. R. Singh, G.-M. Hong, and S. Kim, “Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files,” IEEE Transactions on Circuits and Systems-I, vol. 60, no. 4, pp. 965-974, April 2013.
7. R. Singh, J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, “Power-Gating Noise Minimization by Three-Step Wake-up Partitioning,” IEEE Transactions on Circuits and Systems-I, vol. 59, no. 4, pp. 749-762, April 2012.
Office 137A,1st Floor, EE Main Bldg.,
Department of Electrical Engineering,
IIT Bombay, Powai,
Mumbai 400076, India
(O) +91-22-2576-7417
• Ph.D., Electrical and Computer Engineering, Carnegie Mellon University, USA (2018)
• M.Sc., Electrical Engineering, Seoul National University, South Korea (2011)
• B.Tech., Electronics Engineering, Indian Institute of Technology (BHU), Varanasi (2008)
• Analog/RF/millimeter-wave integrated circuits, systems, and architectures
• IC design for emerging communication technologies
• Digital/mixed-signal calibration techniques for RF transceivers
• Staff RFIC Engineer, RF/Analog Group, Qualcomm, San Diego, USA (2018-2023)
• Engineer, SOC Processor Development, Samsung Electronics, South Korea (2011-2013)
1. R. Singh, S. Mondal and J. Paramesh, “A Millimeter-wave Receiver Using a Wideband Low-Noise Amplifier with One-Port Coupled Resonator Loads,” IEEE Trans. on Microwave Theory and Techniques, vol. 68, no. 9, pp. 3794-3803, Sept. 2020.
2. R. Singh, S. Mondal and J. Paramesh, “A Compact Digitally-Assisted Merged LNA Vector Modulator Using Coupled Resonators for Integrated Beamforming Transceivers,” IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 2555-2568, Jul. 2019.
3. S. Mondal, R. Singh, A. I. Hussein, and J. Paramesh, “A 25-30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication,” IEEE Journal of Solid-State Circuits, vol. 53, pp. 1275-1287, May 2018.
4. S. Mondal, R. Singh, and J. Paramesh, “A Reconfigurable 28/37 GHz Hybrid-Beamforming MIMO Receiver with Inter-Band Carrier Aggregation and RF-Domain LMS Weight Adaptation,” Proceedings of the International Solid-State Circuits Conference (ISSCC), pp. 72-74, Feb. 2018.
5. R. Singh and J. Paramesh, “A Digitally-Tuned Triple-Band Transformer Power Combiner for CMOS Power Amplifiers,” Proceedings of the IEEE Radio Frequency Circuits Symposium (RFIC), pp. 332-335, June 2017.
6. R. Singh, G.-M. Hong, and S. Kim, “Bitline Techniques with Dual Dynamic Nodes for Low-Power Register Files,” IEEE Transactions on Circuits and Systems-I, vol. 60, no. 4, pp. 965-974, April 2013.
7. R. Singh, J.-K. Woo, H. Lee, S. Y. Kim, and S. Kim, “Power-Gating Noise Minimization by Three-Step Wake-up Partitioning,” IEEE Transactions on Circuits and Systems-I, vol. 59, no. 4, pp. 749-762, April 2012.
Office 137A,1st Floor, EE Main Bldg.,
Department of Electrical Engineering,
IIT Bombay, Powai,
Mumbai 400076, India
(O) +91-22-2576-7417
Office 137A,1st Floor, EE Main Bldg.,
Department of Electrical Engineering,
IIT Bombay, Powai,
Mumbai 400076, India
(O) +91-22-2576-7417
IIT Bombay was established in the year 1957 and the department of Electrical Engineering (EE) has been one of its major departments since its inception.
IIT Bombay was established in the year 1957 and the department of Electrical Engineering (EE) has been one of its major departments since its inception.
Links
Contact Us
IIT Bombay was established in the year 1957 and the department of Electrical Engineering (EE) has been one of its major departments since its inception.
Links
Contact Us
© 2023, IITB. All rights reserved.
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© , IITB. All rights reserved.
About | IITBEducation | Research | Site Map | Feedback | RTI | Contact Us
© 2023, IITB. All rights reserved.